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Inventor: Jack Hwang


Address: Portland, OR
No. of patents: 13
Last patent issue date: 02/22/2011

NumberTitleIssue Date
7892971Sub-second annealing processes for semiconductor devices
An annealing method and apparatus for semiconductor manufacturing is described. The method and apparatus allows an anneal that can span a thermal budget and be tailored to a specific process and its corresponding activation energy. In some cases, the annealing metho...
02/22/2011
7858981Strained NMOS transistor featuring deep carbon doped regions and raised donor doped source and drain
Some embodiments of the present invention include providing carbon doped regions and raised source/drain regions to provide tensile stress in NMOS transistor channels. ...
12/28/2010
7790587Method to reduce junction leakage through partial regrowth with ultrafast anneal and structures formed thereby
Methods and associated structures of forming a microelectronic device are described. Those methods may include creating an amorphous region in source/drain regions of a substrate by ion implantation with an electrically neutral dopant, annealing with a first anneal ...
09/07/2010
7758238Temperature measurement with reduced extraneous infrared in a processing chamber
Temperature measurement using a pyrometer in a processing chamber is described. The extraneous light received by the pyrometer is reduced. In one example, a photodetector is used to measure the intensity of light within the processing chamber at a defined wavelength...
07/20/2010
7479431Strained NMOS transistor featuring deep carbon doped regions and raised donor doped source and drain
Some embodiments of the present invention include providing carbon doped regions and raised source/drain regions to provide tensile stress in NMOS transistor channels. ...
01/20/2009
7439113Forming dual metal complementary metal oxide semiconductor integrated circuits
Complementary metal oxide semiconductor metal gate transistors may be formed by depositing a metal layer in trenches formerly inhabited by patterned gate structures. The patterned gate structures may have been formed of polysilicon in one embodiment. The metal layer...
10/21/2008
7223660Flash assisted annealing
The present disclosure relates to a rapid thermal processing system that may be useful for processing semiconductor devices. A flash lamp may be utilized to provide pulse heating of a semiconductor for annealing or other purposes. A sensor may be provided to sense a...
05/29/2007
7109443Multi-zone reflecting device for use in flash lamp processes
A method, apparatus, and system including a reflecting device having a plurality of reflecting zones with associated reflectivities for reflecting light from a flash lamp, are described herein. ...
09/19/2006
7102141Flash lamp annealing apparatus to generate electromagnetic radiation having selective wavelengths
Flash lamp apparatuses that generate electromagnetic radiation with wavelengths greater than and/or less than a defined range of wavelengths are disclosed. ...
09/05/2006
6936518Creating shallow junction transistors
A polysilicon structure may be defined on a semiconductor substrate using plasma doping to dope the sidewalls and upper surface of the polysilicon material as well as the source drain extensions. Shortly after plasma doping, the structure may be encapsulated within ...
08/30/2005
6911706Forming strained source drain junction field effect transistors
By providing a high dose germanium implant and then forming a P-type source/drain extension, a strained source/drain junction may be formed. The strained source/drain junction may be shallower and have lower resistivity in some embodiments. ...
06/28/2005
6808993Ultra-thin gate dielectrics
An in-situ ultra dilute ammonia nitridation process and apparatus of the following ultra-thin chemically tailored gate dielectrics: DCE/O2 (Trans 1,2-Dichloroethylene) based ultra-thin gate dielectric; Nitric Oxide (NO) based ultra-thin gate dielectric th...
10/26/2004
6638802Forming strained source drain junction field effect transistors
By providing a high dose germanium implant and then forming a P-type source/drain extension, a strained source/drain junction may be formed. The strained source/drain junction may be shallower and have lower resistivity in some embodiments....
10/28/2003
 
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