|7394127||Non-volatile memory device having a charge storage oxide layer and operation thereof|
A non-volatile memory device includes a pair of source/drain regions disposed in a semiconductor substrate, having a channel region between them. A charge storage oxide layer is disposed on the channel region and overlaps part of each of the pair of source/drain reg...
|7184316||Non-volatile memory cell array having common drain lines and method of operating the same|
A nonvolatile memory cell array having common drain lines and method of operating the same are disclosed. A positive voltage is applied to a gate of a selected cell and gates of memory cells that share a word line with the selected cell. A first voltage is applied t...
|7179709||Method of fabricating non-volatile memory device having local SONOS gate structure|
in methods of fabricating a non-volatile memory device having a local silicon-oxide-nitride-oxide-silicon (SONOS) gate structure, a semiconductor substrate having a cell transistor area, a high voltage transistor area, and a low voltage transistor area, is prepared....