Inventor: Daniel C. Guterman

Address: Fremont, CA
No. of patents: 138
Last patent issue date: 01/24/2012

Number	Title	Issue Date
8103938	Increasing the effectiveness of error correction codes and operating multi-level memory systems by using information about the quality of the stored data The quality of data stored in a memory system is assessed by different methods, and the memory system is operated according to the assessed quality. The data quality can be assessed during read operations. Subsequent use of an Error Correction Code can utilize the q...	01/24/2012
8014197	System and method for programming cells in non-volatile integrated memory devices A system and method for quickly and efficiently programming hard-to-program storage elements in non-volatile integrated memory devices is presented. A number of storage elements are simultaneously subjected to a programming process with the current flowing through t...	09/06/2011
7916552	Tracking cells for a memory system Tracking cells are used in a memory system to improve the read process. The tracking cells can provide an indication of the quality of the data and can be used as part of a data recovery operation if there is an error. The tracking cells provide a means to adjust th...	03/29/2011
7898868	Multi-state memory Maximized multi-state compaction and more tolerance in memory state behavior is achieved through a flexible, self-consistent and self-adapting mode of detection, covering a wide dynamic range. For high density multi-state encoding, this approach borders on full anal...	03/01/2011
7886204	Methods of cell population distribution assisted read margining A memory using techniques to extract the data content of its storage elements, when the distribution of stored states is degraded, is presented. If the distribution of stored states has degraded, secondary evaluations of the memory cells are performed using modified...	02/08/2011
7848149	Reducing the effects of noise in non-volatile memories through multiple reads Storage elements are read multiple times and the results are accumulated and averaged for each storage element to reduce the effects of noise or other transients in the storage elements and associated circuits that may adversely affect the quality of the read. Sever...	12/07/2010
7839685	Soft errors handling in EEPROM devices Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected duri...	11/23/2010
7834392	Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements Non-volatile memory cells store a level of charge corresponding to the data being stored in a dielectric material storage element that is sandwiched between a control gate and the semiconductor substrate surface over channel regions of the memory cells. More than tw...	11/16/2010
7821835	Concurrent programming of non-volatile memory One embodiment of the present invention includes applying a first value to a bit line, boosting word lines associated with the bit line and a common selection line to create a first condition based on the first value, and cutting off a boundary non-volatile storage ...	10/26/2010
7796444	Concurrent programming of non-volatile memory One embodiment of the present invention includes applying a first value to a bit line, boosting word lines associated with the bit line and a common selection line to create a first condition based on the first value, and cutting off a boundary non-volatile storage ...	09/14/2010
7760555	Tracking cells for a memory system Tracking cells are used in a memory system to improve the read process. The tracking cells can provide an indication of the quality of the data and can be used as part of a data recovery operation if there is an error. The tracking cells provide a means to adjust th...	07/20/2010
7747927	Method for adapting a memory system to operate with a legacy host originally designed to operate with a different memory system A non-volatile memory device is provided with a controller and includes method that controls memory operations and to emulate the memory and communication characteristics of a legacy memory device. In this way, the memory device is compatible with a host that was or...	06/29/2010
7739472	Memory system for legacy hosts A non-volatile memory device is provided with a controller and includes method that controls memory operations and to emulate the memory and communication characteristics of a legacy memory device. In this way, the memory device is compatible with a host that was or...	06/15/2010
7716538	Memory with cell population distribution assisted read margining A memory using techniques to extract the data content of its storage elements, when the distribution of stored states is degraded, is presented. If the distribution of stored states has degraded, secondary evaluations of the memory cells are performed using modified...	05/11/2010
7681094	Data recovery in a memory system using tracking cells Tracking cells are used in a memory system to improve the read process. The tracking cells can provide an indication of the quality of the data and can be used as part of a data recovery operation if there is an error. The tracking cells provide a means to adjust th...	03/16/2010
7633807	Behavior based programming of non-volatile memory The process for programming a set of memory cells is improved by adapting the programming process based on behavior of the memory cells. For example, a set of program pulses is applied to the word line for a set of flash memory cells. A determination is made as to w...	12/15/2009
7630237	System and method for programming cells in non-volatile integrated memory devices A system and method for quickly and efficiently programming hard-to-program storage elements in non-volatile integrated memory devices is presented. A number of storage elements are simultaneously subjected to a programming process with the current flowing through t...	12/08/2009
7616484	Soft errors handling in EEPROM devices Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected duri...	11/10/2009
7584391	Smart verify for multi-state memories A “smart verify” technique, whereby multi-state memories are programmed using a verify-results-based dynamic adjustment of the multi-states verify range for sequential-state-based verify implementations, is presented. This technique can increase multi-state writ...	09/01/2009
7579247	Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements Non-volatile memory cells store a level of charge corresponding to the data being stored in a dielectric material storage element that is sandwiched between a control gate and the semiconductor substrate surface over channel regions of the memory cells. More than tw...	08/25/2009
7573740	Multi-state memory Maximized multi-state compaction and more tolerance in memory state behavior is achieved through a flexible, self-consistent and self-adapting mode of detection, covering a wide dynamic range. For high density multi-state encoding, this approach borders on full anal...	08/11/2009
7570518	Concurrent programming of non-volatile memory One embodiment of the present invention includes applying a first value to a bit line, boosting word lines associated with the bit line and a common selection line to create a first condition based on the first value, and cutting off a boundary non-volatile storage ...	08/04/2009
7548461	Soft errors handling in EEPROM devices Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected duri...	06/16/2009
7518928	Efficient verification for coarse/fine programming of non volatile memory A non-volatile memory device is programmed by first performing a coarse programming process and subsequently performing a fine programming process. The coarse/fine programming methodology is enhanced by using an efficient verification scheme that allows some non-vol...	04/14/2009
7479677	Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements Non-volatile memory cells store a level of charge corresponding to the data being stored in a dielectric material storage element that is sandwiched between a control gate and the semiconductor substrate surface over channel regions of the memory cells. More than tw...	01/20/2009
7468915	Method of reducing disturbs in non-volatile memory In a non-volatile memory, the displacement current generated in non-selected word lines that results when the voltage levels on an array's bit lines are changed can result in disturbs. Techniques for reducing these currents are presented. In a first aspect, the numb...	12/23/2008
7457162	Multi-state memory Maximized multi-state compaction and more tolerance in memory state behavior is achieved through a flexible, self-consistent and self-adapting mode of detection, covering a wide dynamic range. For high density multi-state encoding, this approach borders on full anal...	11/25/2008
7453730	Charge packet metering for coarse/fine programming of non-volatile memory A non-volatile memory device is programmed by first performing a coarse programming process and subsequently performing a fine programming process. The coarse/fine programming methodology is enhanced by using an efficient verification scheme that allows some non-vol...	11/18/2008
7449746	EEPROM with split gate source side injection Novel memory cells utilize source-side injection, allowing very small programming currents. If desired, to-be-programmed cells are programmed simultaneously while not requiring an unacceptably large programming current for any given programming operation. In one emb...	11/11/2008
7447075	Charge packet metering for coarse/fine programming of non-volatile memory A non-volatile memory device is programmed by first performing a coarse programming process and subsequently performing a fine programming process. The coarse/fine programming methodology is enhanced by using an efficient verification scheme that allows some non-vol...	11/04/2008
7443726	Systems for alternate row-based reading and writing for non-volatile memory A set of storage elements is programmed beginning with a word line WLn adjacent a select gate line for the set. After programming the first word line, the next word line WLn+1 adjacent to the first word line is skipped and the next word line WLn+2 adjacent to WLn+1 ...	10/28/2008
7443723	Multi-state memory Maximized multi-state compaction and more tolerance in memory state behavior is achieved through a flexible, self-consistent and self-adapting mode of detection, covering a wide dynamic range. For high density multi-state encoding, this approach borders on full anal...	10/28/2008
7437631	Soft errors handling in EEPROM devices Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected duri...	10/14/2008
7414887	Variable current sinking for coarse/fine programming of non-volatile memory A non-volatile memory device is programmed by first performing a coarse programming process and subsequently performing a fine programming process. The coarse/fine programming methodology is enhanced by using an efficient verification scheme that allows some non-vol...	08/19/2008
7411827	Boosting to control programming of non-volatile memory Boosting signals are applied to unselected word lines for a set of NAND strings while a program voltage signal is applied to a selected word line. For a selected NAND string, in a first interval, the drain select gate is opened so that the NAND string communicates w...	08/12/2008
7403421	Noise reduction technique for transistors and small devices utilizing an episodic agitation The present invention presents methods for reducing the amount of noise inherent in the reading of a non-volatile storage device by applying an episodic agitation (e.g. a time varying voltage) to some terminal(s) of the cell as part of the reading process. Various a...	07/22/2008
7397698	Reducing floating gate to floating gate coupling effect For a non-volatile memory system, compressing the erase threshold voltage distribution into the lowest threshold voltage state will decrease the valid data threshold voltage window. Decreasing the valid data threshold voltage window reduces the floating gate to floa...	07/08/2008
7392358	Delivery of a message to a user of a portable data storage device as a condition of its use A memory card, flash memory drive or other removable re-programmable non-volatile memory device is configured so that at least part of the memory is not available for storage of user data until data of a message stored in the memory is at least read out by the user ...	06/24/2008
7385843	Multi-state memory Maximized multi-state compaction and more tolerance in memory state behavior is achieved through a flexible, self-consistent and self-adapting mode of detection, covering a wide dynamic range. For high density multi-state encoding, this approach borders on full anal...	06/10/2008
7376011	Method and structure for efficient data verification operation for non-volatile memories An improved flash EEPROM memory-based storage subsystem includes one or more flash memory arrays, each with three data registers and a controller circuit. During a flash program operation, one data register is used to control the program operation, a second register...	05/20/2008

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Inventor: Daniel C. Guterman