"What can be more palpably absurd than the prospect held out of locomotives traveling twice as fast as stagecoaches?"
|4841174||CMOS circuit with racefree single clock dynamic logic|
Disclosed is an improved logic circuit employing dynamic CMOS logic and having alternating logic employing first and second conductivity type transistors, respectively, separated by clocked inverters. The circuit employs a single clock signal to synchroni...
|4740721||Programmable logic array with single clock dynamic logic|
Disclosed is a programmable logic array employing dynamic CMOS logic and utilizing a single clock signal and its complement to synchronize said dynamic logic operations. The PLA disclosed employs two logic planes for implementing arbitrary logic equations...