Did You Know...
...that to encourage use of his new invention, the shopping cart, market owner Sylvan Goldman hired fake shoppers to push the carts around his store in Oklahoma City? Seems his customers were reluctant to give up their hand-carried baskets.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8335892 | Cache arbitration between multiple clients One embodiment of the present invention sets forth a technique for arbitrating requests received by an L1 cache from multiple clients. The L1 cache outputs bubble requests to a first one of the multiple clients that cause the first one of the multiple clients to ins... | 12/18/2012 |
| 8266383 | Cache miss processing using a defer/replay mechanism One embodiment of the present invention sets forth a technique for processing cache misses resulting from a request received from one of the multiple clients of an L1 cache. The L1 cache services multiple clients with diverse latency and bandwidth requirements, incl... | 09/11/2012 |
| 8266382 | Cache interface protocol including arbitration and hints One embodiment of the present invention sets forth a technique for arbitrating requests received from one of the multiple clients of an L1 cache and for providing hints to the client to assist in arbitration. The L1 cache services multiple clients with diverse laten... | 09/11/2012 |
| 8217954 | Reconfigurable dual texture pipeline with shared texture cache Circuits, methods, and apparatus that provide texture caches and related circuits that store and retrieve texels in an efficient manner. One such texture circuit can provide a configurable number of texel quads for a configurable number of pixels. For bilinear filte... | 07/10/2012 |
| 8212835 | Systems and methods for smooth transitions to bi-cubic magnification One embodiment of the present invention sets forth a technique for transitioning from bilinear sampling to filter-4 sampling, while avoiding the visual artifacts along the boundary between the two different types of filters. The technique may be implemented using a ... | 07/03/2012 |
| 7999821 | Reconfigurable dual texture pipeline with shared texture cache Circuits, methods, and apparatus that provide texture caches and related circuits that store and retrieve texels in an efficient manner. One such texture circuit can provide a configurable number of texel quads for a configurable number of pixels. For bilinear filte... | 08/16/2011 |
| 7948498 | Efficient texture state cache Circuits, methods, and apparatus that store a large number of texture states in an efficient manner. A level-one texture cache includes cache lines that are distributed throughout a texture pipeline, where each cache line stores a texture state. The cache lines can ... | 05/24/2011 |
| 7948495 | Linking texture headers and texture samplers Systems and methods used for binding texture state stored in independent structures may be used by more than one graphics applications programming interface (API). A texture header portion of the texture state defines texture data characteristics and is stored in a ... | 05/24/2011 |
| 7924290 | Method and system for processing texture samples with programmable offset positions A method and system for performing a texture operation with user-specified offset positions are disclosed. Specifically, one embodiment of the present invention sets forth a method, which includes the steps of deriving a first destined texel position based on an ori... | 04/12/2011 |
| 7884831 | Reconfigurable high-performance texture pipeline with advanced filtering Circuits, methods, and apparatus that provide texture caches and related circuits that store and retrieve texels in a fast and efficient manner. One such texture circuit provides an increased number of bilerps for each pixel in a group of pixels, particularly when t... | 02/08/2011 |
| 7705846 | Processing high numbers of independent textures in a 3-D graphics pipeline Circuits, methods, and apparatus provide for the storage of texture descriptors in a graphics memory. Since the texture descriptors are stored in a graphics memory, they do not need to be stored in the graphics processor itself, thus reducing graphics processor circ... | 04/27/2010 |
| 7697009 | Processing high numbers of independent textures in a 3-D graphics pipeline Circuits, methods, and apparatus provide for the storage of texture descriptors in a graphics memory. Since the texture descriptors are stored in a graphics memory, they do not need to be stored in the graphics processor itself, thus reducing graphics processor circ... | 04/13/2010 |
| 7659893 | Method and apparatus to ensure consistency of depth values computed in different sections of a graphics processor At least two different processing sections in a graphics processors compute Z coordinates for a sample location from a compressed Z representation. The processors are designed to ensure that Z coordinates computed in any unit in the processor are identical. In one e... | 02/09/2010 |
| 7649538 | Reconfigurable high performance texture pipeline with advanced filtering Circuits, methods, and apparatus that provide texture caches and related circuits that store and retrieve texels in a fast and efficient manner. One such texture circuit provides an increased number of bilerps for each pixel in a group of pixels, particularly when t... | 01/19/2010 |
| 7589741 | Processing high numbers of independent textures in a 3-D graphics pipeline Circuits, methods, and apparatus provide for the storage of texture descriptors in a graphics memory. Since the texture descriptors are stored in a graphics memory, they do not need to be stored in the graphics processor itself, thus reducing graphics processor circ... | 09/15/2009 |
| 7289126 | Gamma-corrected texel storage in a graphics memory Methods, circuits, and apparatus for handling gamma-corrected texels stored in a graphics memory. On-the-fly gamma-to-linear and linear-to-gamma conversions are performed such that gamma-corrected texels are provided to circuits that are able to process them, while ... | 10/30/2007 |
| 7027063 | Texture cache addressing A method of storing a texel in a texel cache comprising reading a t coordinate of the texel, the t coordinate comprising a plurality of bits, reading a s coordinate of the texel, the s coordinate comprising a plurality of bits, forming an offset by concatenating bit... | 04/11/2006 |
| 6924811 | Circuit and method for addressing a texture cache A method of storing a texel in a texel cache comprising reading a t coordinate of the texel, the t coordinate comprising a plurality of bits, reading a s coordinate of the texel, the s coordinate comprising a plurality of bits, forming an offset by concatenating bit... | 08/02/2005 |
| 6629188 | Circuit and method for prefetching data for a texture cache A cache memory apparatus for graphics and other systems. The cache memory apparatus includes a cache memory having a first number of cache lines, each cache line addressable by a cache line address; a first plurality of storage elements coupled to a first... | 09/30/2003 |
