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Inventor: Francisco J. Castano Pinto


Address: Tres Cantos, ES
No. of patents: 1
Last patent issue date: 01/28/1997

NumberTitleIssue Date
5598445Jitter reduction system in digital demultiplexers
An elastic read-write memory subassembly (EM, WP, WA, RP, RA), whose read clock (RCK) varies its frequency with a signal provided by a phase detector (PHC) as a function of the difference in time at which two pointers, for read (RP) and write (WP), take r...
01/28/1997
 
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