Quotables
"What, sir, would you make a ship sail against the wind and currents by lighting a bonfire under her deck? I pray you, excuse me, I have not the time to listen to such nonsense."
Napoleon Bonaparte ; When told of the Robert Fulton steamboat
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7211889 | Semiconductor package and method for manufacturing the same A semiconductor package includes a wiring board, a semiconductor chip flip-chip bonded to the wiring board, an adhesive coated on the wiring board, a stiffener ring attached to the wiring board, and a heat spreader attached to the stiffener ring and the semiconducto... | 05/01/2007 |
| 6974765 | Encapsulation of pin solder for maintaining accuracy in pin position Solder joints coupling pins to a microelectronic package substrate are enshrouded with an encapsulation material. In this manner, pin movement is limited even if the pin solder subsequently melts. ... | 12/13/2005 |
| 6838770 | Semiconductor device, designing method and designing device thereof A semiconductor device is provided with dummy patterns at an originally thinner portion of each of layers, and each of these dummy patterns is electrically connected to a reference wire that is either a power-supply wire or a ground wire. ... | 01/04/2005 |
| 6806558 | Integrated segmented and interdigitated broadside- and edge-coupled transmission lines A combination edge- and broadside-coupled transmission line element formed in an integrated circuit chip, using semiconductor processes, in a stack of metal layers separated by dielectric layers. Each of the metal layers includes a number of transmission lines. Inte... | 10/19/2004 |
| 6740582 | Integrated circuits and methods for their fabrication To fabricate back side contact pads that are suitable for use in a vertical integrated circuit, vias are made in the face side of a wafer, and dielectric and contact pad metal are deposited into the vias. Then the wafer back side is etched until the metal is exposed... | 05/25/2004 |
| 6737720 | Packaging structure of image sensor and method for packaging the same A packaging structure of an image sensor includes a substrate, an image sensing chip, a plurality of wirings, and a transparent layer. The substrate includes a plurality of metal sheets, glue for sealing the metal sheets, a first surface, and a second surface. The m... | 05/18/2004 |
| 6734528 | Transistor with pi-gate structure and method for producing the same The present invention discloses an improved transistor with a π-gate structure usable at microwave and millimeter wave and comprises a GaAs wafer, GND formed on the bottom surface of the wafer and grounded to source layers formed on the top surface of the wafer by ... | 05/11/2004 |
| 6734535 | Semiconductor device, method of manufacture thereof, circuit board, and electronic instrument A semiconductor device comprising: a semiconductor chip (10) on which a plurality of electrodes are formed; a first flexible substrate (20) which is larger than the surface of the semiconductor chip (10) on which the electrodes (12) are f... | 05/11/2004 |
| 6724095 | Apparatus for aligning an integrated circuit package with an interface An integrated circuit package is provided with alignment pads which are solid or annular ring shaped. Alignment members such as balls or bullets are attached to the alignment pads via a wetting media. When heated, the wetting media serves to center and seat the alig... | 04/20/2004 |
| 6720662 | Semiconductor device of chip-on-chip structure with a radiation noise shield A semiconductor device of chip-on-chip structure is provided which includes a first semiconductor chip and a second semiconductor chip bonded onto the first semiconductor chip in stacked relation. In one embodiment, a noise shield film is provided between the first ... | 04/13/2004 |
| 6720207 | Leadframe, resin-molded semiconductor device including the leadframe, method of making the leadframe and method for manufacturing the device A leadframe includes: a frame rail; a die pad, disposed inside the frame rail, for mounting a semiconductor chip thereon; and a plurality of internal inner leads, which are disposed to surround the die pad and each of which has a convex portion on the bottom thereof... | 04/13/2004 |
| 6720642 | Flip chip in leaded molded package and method of manufacture thereof A chip device that includes a leadframe, a die and a mold compound. The backside of the die is metallized and exposed through a window defined within a mold compound that encapsulates the die when it is coupled to the leadframe. Leads on the leadframe are coupled to... | 04/13/2004 |
| 6713848 | Output stage layout for minimum cross coupling between channels An audio amplifier output stage layout technique achieves minimum cross coupling between audio amplifier channels. Regarding TDAA output stages, the typical TDAA includes two demodulation inductors per audio channel. The two pair of demodulation inductors associated... | 03/30/2004 |
| 6710458 | Tape for chip on film and semiconductor therewith A dummy pattern for preventing generation of air bubbles in resin sealing of a semiconductor element is provided at a corner of the semiconductor element on a tape carrier which is composed of a polyimide-based insulating tape and a copper foil pattern formed thereo... | 03/23/2004 |
| 6710464 | Resin mold semiconductor device A sealing material in a plate form is placed on a frame wherein a recess is provided. A semiconductor chip and the frame are overlapped via the sealing material in a plate form within a thermostatic chamber of which the temperature is higher than the temperature at ... | 03/23/2004 |
| 6710438 | Enhanced chip scale package for wire bond dies A chip scale package assembly comprises an integrated circuit die wire bonded to a carrier for mounting to a printed circuit board. The carrier comprises top and bottom ground planes thermally and electrically bonded together by a number of grounded thermal vias. Th... | 03/23/2004 |
| 6710434 | Window-type semiconductor package and fabrication method thereof A window-type semiconductor package and a fabrication method thereof are provided. A substrate having an opening is mounted with at least a chip in a manner that, a conductive area of an active surface of the chip is exposed to the opening, and electrically connecte... | 03/23/2004 |
| 6710461 | Wafer level packaging of micro electromechanical device The present invention provides a wafer level package of micro electromechanical devices. The wafer level package of the present invention comprises a wafer having a plurality of micro electromechanical devices and a package wafer of the same size. A plurality of con... | 03/23/2004 |
| 6707146 | Semiconductor apparatus with decoupling capacitor A lead frame type of semiconductor apparatus includes a die pad on which a semiconductor chip is mounted; ground terminals which are to be grounded; power supply terminals which are connected to a power supply; inner leads connected to the ground terminals and power... | 03/16/2004 |
| 6707108 | Transient voltage suppressor structure A kind of transient voltage suppressor structure that prevents the edge of the signal electrode from contacting with the variable impedance material by using an insulation layer to remove the point discharge existing on the edge of the signal electrode and increase ... | 03/16/2004 |
| 6707137 | Semiconductor package and method for fabricating the same A semiconductor package and fabricating method are described, in which solder balls can be easily arrayed in a fan-out type arrangement and the package fabricating process is simplified. The semiconductor package includes a unit semiconductor chip and a first stress... | 03/16/2004 |
| 6707124 | HID land grid array packaged device having electrical and optical interconnects A high density interconnect device which creates a thin, electrically and thermally high performance package for semiconductor devices having a mechanically stable and high thermal conductivity substrate. Cavities in the substrate accommodate semiconductor devices a... | 03/16/2004 |
| 6704206 | Assembly device and method for assembling an electronic component An assembly device for an electronic component in sandwich type of construction. The electronic component includes at least one semiconductor element which is contacted in a planar fashion on its lower side and its upper side each by one circuit substrate... | 03/09/2004 |
| 6703699 | Semiconductor device The present invention has an object to provide a more compact semiconductor device that can be assembled with reduced parts and tasks. The semiconductor device includes a housing having a top and bottom surfaces. Surrounded within the housing is an insula... | 03/09/2004 |
| 6700186 | Lead frame for a semiconductor device, a semiconductor device made from the lead frame, and a method of making a semiconductor device A lead frame for a semiconductor device. The semiconductor device has a sheet with oppositely facing sides and a thickness between the oppositely facing sides. The sheet has first and second unit lead frames. Each unit lead frame has a support for a semic... | 03/02/2004 |
| 6700187 | Semiconductor package and method for manufacturing the same A semiconductor package comprising a semiconductor die having opposed, generally planar first and second surfaces and a peripheral edge. Formed on the second surface of the semiconductor die in close proximity to the peripheral edge thereof are a pluralit... | 03/02/2004 |
| 6689640 | Chip scale pin array An integrated circuit package with lead fingers with a footprint on the order of the integrated circuit footprint is provided. A lead frame may be made from a metal sheet, which may be stamped or etched. The lead frame provides a plurality of posts and a ... | 02/10/2004 |
| 6683385 | Low profile stack semiconductor package A low profile stack semiconductor package is proposed. A lower chip having centrally-situated bond pads is mounted on a substrate, and electrically connected to the substrate by bonding wires. A cushion member is peripherally situated on the lower chip, a... | 01/27/2004 |
| 6680544 | Flip-chip bump arrangement for decreasing impedance A bump arrangement of a flip-chip is disclosed. The bump arrangement comprises: a conductive bumps array formed at a core region of the flip-chip, a first ring of conductive bumps surrounding the conductive bumps array, a second ring surrounding the first... | 01/20/2004 |
| 6680523 | Semiconductor wafer with process control modules A semiconductor wafer (1) has a multitude of chips (5), of which chips (5) each one of a given number of chips (5) is situated in one of a multitude of adjacent exposure fields (2), and further has process control modules (4) which are each arranged in an... | 01/20/2004 |
| 6674159 | Bi-level microelectronic device package with an integral window A package with an integral window for housing a microelectronic device. The integral window is bonded directly to the package without having a separate layer of adhesive material disposed in-between the window and the package. The device can be a semicond... | 01/06/2004 |
| 6674143 | Hermetically sealing package for optical semiconductor and optical semiconductor module A hermetically sealing package for an optical semiconductor equipped with a light transmitting window whose light transmitting surface is inclined at least six degrees from the vertical line of the package bottom plate and which is joined to a cylindrical... | 01/06/2004 |
| 6670215 | Semiconductor device and manufacturing method thereof A ball grid array type semiconductor package includes a semiconductor chip formed with bonding pads, an elastomer bonded to the semiconductor chip, a flexible wiring substrate bonded to the elastomer and formed with wirings connected at one end of the bon... | 12/30/2003 |
| 6664622 | Header for electronic components board in surface mount and through-hole assemble A low-cost header for connecting an electronic components board to a circuit board is disclosed, consisting of side walls made of an unwarpable plastic material and joined together to form a frame around an area substantially the same as the area of the c... | 12/16/2003 |
| 6664643 | Semiconductor device and method for manufacturing the same In a stacked package in which semiconductor chips are stacked in layers, in order to mount the semiconductor chips without damaging the semiconductor chips even when an upper semiconductor chip has a greater size, a first chip 12 is mounted on an interpos... | 12/16/2003 |
| 6664616 | Semiconductor device and manufacturing method thereof A semiconductor chip 2 is disposed within a device hole as formed in a tape base material 1a of a tape carrier 1, which chip is smaller in thickness than the tape base material 1a, and then sealing is performed using a seal resin 3 to permit both the prin... | 12/16/2003 |
| 6661084 | Single level microelectronic device package with an integral window A package with an integral window for housing a microelectronic device. The integral window is bonded directly to the package without having a separate layer of adhesive material disposed in-between the window and the package. The device can be a semicond... | 12/09/2003 |
| 6661081 | Semiconductor device and its manufacturing method Attaining improvement of the reliability and standardization of the lead frame. A semiconductor device comprises a plurality of inner leads extending around a semiconductor chip, a tape substrate supporting the semiconductor chip and joined to respective ... | 12/09/2003 |
| 6657282 | Semiconductor device having a ball grid array and a fabrication process thereof A semiconductor device has a resin package layer on a principal surface of a semiconductor chip, on which a number of bump electrodes are formed, wherein the semiconductor device has a chamfer surface or a stepped surface on a top edge part such that the ... | 12/02/2003 |
| 6657296 | Semicondctor package A semiconductor package is proposed, in which at least one chip is mounted on a substrate, and at least one die-attach region is formed on the substrate. A plurality of thermal vias formed in the die-attach region and penetrating the substrate, in a manne... | 12/02/2003 |
