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| Number | Title | Issue Date |
| 8188509 | Organic light emitting display device An organic light emitting display device which prevents deterioration of an organic light emitting diode (OLED), the organic light emitting display device includes a first substrate including a display unit that includes at least one organic light emitting diode (OL... | 05/29/2012 |
| 8188475 | Top emission type organic electroluminescent device and method of fabricating the same An organic electroluminescent device includes a first substrate including a plurality of pixel regions; a thin film transistor on the first substrate and in each pixel region; a second substrate facing the first substrate; an organic electroluminescent diode on the ... | 05/29/2012 |
| 8183113 | Methods of forming recessed gate structures including blocking members, and methods of forming semiconductor devices having the recessed gate structures A recessed gate structure in a semiconductor device includes a gate electrode partially buried in a substrate, a blocking member formed in the buried portion of the gate electrode, and a gate insulation layer formed between the gate electrode and the substrate. The ... | 05/22/2012 |
| 8174005 | Organic light emitting diode lighting apparatus An organic light emitting diode lighting apparatus is disclosed. The apparatus includes a plurality of electrode lines that feed current to or from a plurality of light emitting diodes, and a flexible printed circuit board (FPCB) that has a plurality of connection l... | 05/08/2012 |
| 8175124 | Frit sealing system A frit sealing system for combining a first substrate and a second substrate using frit comprises a laser generating a laser beam, and a homogenizer normalizing the intensity of the laser beam within a cross section of the laser beam in the transverse direction. The... | 05/08/2012 |
| 8169000 | Lateral transient voltage suppressor with ultra low capacitance A lateral transient voltage suppressor with ultra low capacitance is disclosed. The suppressor comprises a first conductivity type substrate and at least one diode cascade structure arranged in the first conductivity type substrate. The cascade structure further com... | 05/01/2012 |
| 8158535 | Method for forming insulating film and method for manufacturing semiconductor device A method for forming an insulating film includes a step of preparing a substrate, which is to be processed and has silicon exposed on the surface, a step of performing oxidizing to the silicon on the surface, and forming a silicon oxide thin film on the surface of t... | 04/17/2012 |
| 8158448 | Resonator and methods of making resonators A resonator and method of making a resonator are provided. A particular method includes etching a silicon substrate to form a resonator structure. The resonator structure includes at least one resonator beam. The method also includes converting at least a portion of... | 04/17/2012 |
| 8154066 | Titanium aluminum oxide films A dielectric layer containing an insulating metal oxide film having multiple metal components and a method of fabricating such a dielectric layer produce a reliable dielectric layer for use in a variety of electronic devices. Embodiments include a titanium aluminum ... | 04/10/2012 |
| 8148817 | Multi-die DC-DC buck power converter with efficient packaging A DC-DC buck converter in multi-die package is proposed having an output inductor, a low-side Schottky diode and a high-side vertical MOSFET controlled by a power regulating controller (PRC). The multi-die package includes a first die pad with the Schottky diode pla... | 04/03/2012 |
| 8143661 | Memory cell system with charge trap A memory cell system is provided including a first insulator layer over a semiconductor substrate, a charge trap layer over the first insulator layer, and slot where the charge trap layer includes a second insulator layer having the characteristic of being grown. | 03/27/2012 |
| 8143712 | Die package structure A die package structure, which comprises: a first die; a second die; a core material layer, provided between the first die and the second die; at least one via, penetrating through the first die, the second die and the core material layer; a metal material, stuffing... | 03/27/2012 |
| 8138603 | Redundancy design with electro-migration immunity An IC interconnect for high direct current (DC) that is substantially immune to electro-migration (EM) damage, a design structure of the IC interconnect and a method of manufacture of the IC interconnect is provided. The structure has electro-migration immunity and ... | 03/20/2012 |
| 8134235 | Three-dimensional semiconductor device A three-dimensional semiconductor device using redundant bonding-conductor structures to make inter-level electrical connections between multiple semiconductor chips. A first chip, or other semiconductor substrate, forms a first active area on its upper surface, and... | 03/13/2012 |
| 8129220 | Method and system for bonding electrical devices using an electrically conductive adhesive A system for bonding electrical devices using an electrically conductive adhesive to adhere the electrical devices together, the system comprising: an ultrasonic transducer to generate an ultrasonic vibration; and an ultrasonic to thermal energy apparatus operativel... | 03/06/2012 |
| 8125009 | Mounting circuit substrate A semiconductor package containing a field effect transistor (FET) used in a high frequency band includes a mounting circuit substrate on which the semiconductor device is mounted. The mounting circuit substrate has a gate wiring conductor, a drain wiring conductor,... | 02/28/2012 |
| 8124447 | Manufacturing method of advanced quad flat non-leaded package The manufacturing method of advanced quad flat non-leaded packages includes performing a pre-cutting process prior to the backside etching process for defining the contact terminals. The pre-cutting process ensures the isolation of individual contact terminals and i... | 02/28/2012 |
| 8115244 | Transistor of volatile memory device with gate dielectric structure capable of trapping charges The present invention relates to a transistor of a volatile memory device with gate dielectric structure capable of trapping charges and a method for fabricating the same. The transistor in a cell region of a volatile memory device includes a substrate of a first co... | 02/14/2012 |
| 8114718 | Antiblooming imaging apparatus, systems, and methods Apparatus, systems, and methods are described to assist in reducing dark current in an active pixel sensor. In various embodiments, a potential barrier arrangement is configured to block the flow of charge carriers generated outside a photosensitive region. In vario... | 02/14/2012 |
| 8110915 | Open cavity leadless surface mountable package for high power RF applications An RF semiconductor package includes a substrate having generally planar top and bottom surfaces. The substrate includes a metallic base region and one or more metallic signal terminal regions extending from the top surface to the bottom surface, and an insulative m... | 02/07/2012 |
| 8110912 | Semiconductor device A method of manufacturing a semiconductor device includes providing a foil formed of an insulating material, where the foil includes at least one electrically conducting element, providing a chip having contact elements on a first face of the chip, and applying the ... | 02/07/2012 |
| 8110871 | Semiconductor device with recess and fin structure The semiconductor device includes an active region, a recess, a Fin channel region, a gate insulating film, and a gate electrode. The active region is defined by a device isolation structure formed in a semiconductor substrate. The recess is formed by etching the ac... | 02/07/2012 |
| 8106458 | SOI CMOS circuits with substrate bias The present invention relates to methods and devices for reducing the threshold voltage difference between an n-type field effect transistor (n-FET) and a p-type field effect transistor (p-FET) in a complementary metal-oxide-semiconductor (CMOS) circuit located on a... | 01/31/2012 |
| 8101479 | Fabrication of asymmetric field-effect transistors using L-shaped spacers A gate electrode (302) of a field-effect transistor (102) is defined above, and vertically separated by a gate dielectric layer (300) from, a channel-zone portion (284) of body material of a semiconductor body. Semiconductor dopant is int... | 01/24/2012 |
| 8101476 | Stress memorization dielectric optimized for NMOS and PMOS A method for forming a tensile SiN stress layer for stress memorization enhancement of NMOS transistors with a high Si—H/N—H bond ratio that does not degrade PMOS transistors. A CMOS integrated circuit is processed through a NMOS source and drain implant but not... | 01/24/2012 |
| 8101463 | Method of manufacturing a semiconductor device A method of manufacturing a semiconductor device includes placing a chip on a carrier, and applying an electrically conducting layer to the chip and the carrier. The method additionally includes converting the electrically conducting layer into an electrically insul... | 01/24/2012 |
| 8097527 | Method of forming epitaxial layer A method of forming an epitaxial layer on a silicon substrate includes (a) providing a silicon substrate; (b) performing a wet-cleaning process onto the silicon substrate; (c) performing a first plasma cleaning process onto the wet-cleaned silicon substrate by provi... | 01/17/2012 |
| 8097908 | Antiblooming imaging apparatus, systems, and methods Apparatus, systems, and methods are described to assist in reducing dark current in an active pixel sensor. In various embodiments, a potential barrier arrangement is configured to block the flow of charge carriers generated outside a photosensitive region. In vario... | 01/17/2012 |
| 8093112 | Method for manufacturing display device A method for manufacturing display devices including thin film transistors with high reliability in a high yield is provided. A gate insulating film is formed over a gate electrode; a microcrystalline semiconductor is formed over the gate insulating film; the microc... | 01/10/2012 |
| 8093577 | Three-dimensional phase-change memory array A three-dimensional phase-change memory array. In one embodiment of the invention, the memory array includes a first plurality of diodes, a second plurality of diodes disposed above the first plurality of diodes, a first plurality phase-change memory elements dispos... | 01/10/2012 |
| 8089116 | FLOTOX-TYPE EEPROM and method for manufacturing the same A FLOTOX-TYPE EEPROM of the invention has a configuration wherein an N region 25 as an impurity region formed under a tunnel window 12 and a channel stopper region 19 formed under a LOCOS oxide film 18 are spaced apart by a predetermined ... | 01/03/2012 |
| 8084818 | High mobility tri-gate devices and methods of fabrication A high mobility semiconductor assembly. In one exemplary aspect, the high mobility semiconductor assembly includes a first substrate having a first reference orientation located at a crystal plane location on the first substrate and a second substrate formed o... | 12/27/2011 |
| 8058164 | Methods of fabricating electronic devices using direct copper plating The present invention relates to methods and structures for the metallization of semiconductor devices. One aspect of the present invention is a method of forming a semiconductor device having copper metallization. In one embodiment, the method includes providing a ... | 11/15/2011 |
| 8039314 | Metal adhesion by induced surface roughness Back side metal (BSM) delamination induced by chip dicing of silicon wafers is avoided by roughening the polished silicon surface at chip edges by etching. The Thru-Silicon-Via (TSV) structures used in 3D chip integration is masked at the back side from roughening t... | 10/18/2011 |
| 8034646 | Light emitting element, light emitting device and semiconductor device It is an object of the present invention to provide a semiconductor device, in particular, a light emitting element which can be easily manufactured with a wet method. One feature of the invention is a light emitting device including a transistor and a light emittin... | 10/11/2011 |
| 8035236 | Semiconductor device comprising high performance encapsulation resins A semiconductor device comprising curable polyorganosiloxane composites is provided where the composites contain at least 0.1 wt % of the 4th and/or 13th group elements of the periodic table. The cured polyorganosiloxane composites may be catal... | 10/11/2011 |
| 8034689 | Method for fabricating a semiconductor device and the semiconductor device made thereof A method for fabricating a semiconductor device and the device made thereof are disclosed. In one aspect, the method includes providing a substrate comprising a semiconductor material. The method further includes patterning at least one fin in the substrate, the fin... | 10/11/2011 |
| 8030119 | Integrated method and system for manufacturing monolithic panels of crystalline solar cells A method for fabricating a photovoltaic (PV) cell panel wherein all PV cells are formed simultaneously on a two-dimensional array of monocrystalline silicon mother wafers affixed to a susceptor is disclosed. Porous silicon separation layers are anodized in the surfa... | 10/04/2011 |
| 8026551 | Source follower circuit or bootstrap circuit, driver circuit comprising such circuit, and display device comprising such driver circuit In the case of using an analog buffer circuit, an input voltage is required to be added a voltage equal to a voltage between the gate and source of a polycrystalline silicon TFT; therefore, a power supply voltage is increased, thus a power consumption is increased w... | 09/27/2011 |
| 8026590 | Die package and method of manufacturing the same Disclosed herein are a die package and a method of manufacturing the die package. A solder layer is formed on a lower surface of a die. The die is self-aligned and attached to a support plate using surface tension between the solder layer and a metal layer of the su... | 09/27/2011 |
