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| Number | Title | Issue Date |
| 5585292 | Method of fabricating a thin film transistor A thin film transistor comprises an insulator interposed between a gate electrode and a polycrystalline silicon semiconductor layer, with the polycrystalline silicon semiconductor layer having a source region and a drain region with a channel between the ... | 12/17/1996 |
| 5540785 | Fabrication of defect free silicon on an insulating substrate A method for fabricating silicon on insulator structures having a dislocation free silicon layer. The method utilizes low temperature UHVCVD to deposit a very heavily doped etch stop layer having a very steep doping profile onto a substrate and a lightly ... | 07/30/1996 |
| 5523255 | Method for forming a device isolation film of a semiconductor device A method for forming a device isolation film of a semiconductor device, which includes the steps of forming a pad oxide film on a semiconductor substrate, forming an oxidation buffer layer on the pad oxide film, forming an oxidation prevention film on the... | 06/04/1996 |
| 5518966 | Method for wet etching polysilicon A method is disclosed for the wet etching of polysilicon, which comprises the steps of: annealing a lamination structure of a doped polysilicon and an undoped polysilicon at a predetermined temperature for a predetermined period; and applying to the annea... | 05/21/1996 |
| 5506167 | Method of making a high resistance drain junction resistor in a SRAM An improved SRAM resistor structure having implanted therein ions of an material in the surface layer of a drain junction region juxtaposed to an overlying metal contact layer providing the benefits of high resistance, low energy consumption, a single ion... | 04/09/1996 |
| 5504042 | Porous dielectric material with improved pore surface properties for electronics applications This invention provides an improved porous structure for semiconductor devices and a process for making the same. This process may be applied to an existing porous structure 28, which may be deposited, for example, between patterned conductors 24. The pro... | 04/02/1996 |
| 5504032 | Micromechanical accelerometer and method of manufacture thereof A high precision micromechanical accelerometer comprises a layered structure of five (5) semiconductor wafers insulated from one another by thin semiconductor material oxide layers. The accelerometer is formed by first connecting a coverplate and a basepl... | 04/02/1996 |
| 5502006 | Method for forming electrical contacts in a semiconductor device When taper portions of contact holes are etched to form wiring conductors in a semiconductor device, a hydrophobic insulating film having methyl groups on its surface is formed on a SiO2 film in the low pressure CVD process, using mixed gas of ... | 03/26/1996 |
| 5500386 | Manufacturing method of semiconductor devices A method of manufacturing a semiconductor device, where on top of a substrate having already-completed circuit elements and wiring, etc., an insulation underlayer a, Pt layer for a bottom electrode, a dielectric film and a Pt layer for a top electrode are... | 03/19/1996 |
| 5498566 | Isolation region structure of semiconductor device and method for fabricating the same An isolation region structure of a semiconductor device and a method for fabricating the same using both a buried oxide isolation technique and a local oxidation of silicon technique, thereby capable of having an advantage of high integrity. In the isolat... | 03/12/1996 |
| 5496764 | Process for forming a semiconductor region adjacent to an insulating layer An insulating layer is formed over a first substrate. Trenches are formed within a second substrate, and those trenches are filled with an insulating layer. The two substrate are bonded at their insulating layers. The portion of the second substrate away ... | 03/05/1996 |
| 5496765 | Method for manufacturing an insulating trench in a substrate for smart-power technologies For manufacturing an insulation trench in a SOI substrate wherein logic components and high-voltage power components are integrated, a trench extending down onto the insulating layer of the SOI substrate is etched. By providing the sidewalls of the trench... | 03/05/1996 |
| 5494849 | Single-etch stop process for the manufacture of silicon-on-insulator substrates A single-etch stop process for the manufacture of silicon-on-insulator substrates. The process includes forming a silicon-on-insulator bonded substrate comprising a handle wafer, a device wafer, a device layer having a thickness of between about 0.5 and 5... | 02/27/1996 |
| 5494834 | Optoelectronic semiconductor device comprising a waveguide and method of manufacturing such a device Optoelectronic semiconductor device comprising a waveguide and method of manufacturing such a device. Optoelectronic semiconductor devices which have a groove-shaped waveguide in an oxide layer provided on a silicon substrate are compact, easy to manufact... | 02/27/1996 |
| 5492858 | Shallow trench isolation process for high aspect ratio trenches Disclosed is a method of planarizing the surface of a silicon wafer in integrated circuit manufacture where shallow trench isolation techniques are employed. The etched trenches are first coated with a silicon nitride protective liner before the trenches ... | 02/20/1996 |
| 5492857 | High-frequency wireless communication system on a single ultrathin silicon on sapphire chip A high-frequency wireless communication system on a single ultrathin silicon on sapphire chip is presented. This system incorporates analog, digital (logic and memory) and high radio frequency circuits on a single ultrathin silicon on sapphire chip. The d... | 02/20/1996 |
| 5488012 | Silicon on insulator with active buried regions A method for forming patterned buried components, such as collectors, sources and drains, in silicon-on-insulator (SOI) devices. The method is carried out by epitaxially growing a suitable sequence of single or multiple etch stop layers ending with a thin... | 01/30/1996 |
| 5482889 | Method for producing of semiconductor device having of channel stopper under field insulating layer A method for the preparation of semiconductor devices which comprises steps of forming a nitride film on a first conductivity type semiconductor substrate, selectively removing the nitride film, oxidation with the remaining nitride film as the mask to for... | 01/09/1996 |
| 5480832 | Method for fabrication of semiconductor device An object of the invention is to prevent the occurrence of breaking or short-circuiting of a wiring caused by a difference in level in an isolation trench area formed in an SOI substrate. An oxide film is formed for a pad on the main surface of an SOI lay... | 01/02/1996 |
| 5478408 | SOI substrate and manufacturing method therefor There is provided an SOI (Silicon On Insulator) substrate having a thick SOI layer, where crystallographic defects mainly consisting of OSFs (Oxidation Induced Stacking Fault) are practically prevented from occurrence in the SOI layer, according to the pr... | 12/26/1995 |
| 5474952 | Process for producing a semiconductor device A process for producing a semiconductor service of the type having a semiconductor substrate; a semiconductor layer disposed on the semiconductor substrate; a first element formed in a region of the semiconductor layer and having a perimeter including a b... | 12/12/1995 |
| 5474953 | Method of forming an isolation region comprising a trench isolation region and a selective oxidation film involved in a semiconductor device The present invention provides a novel method of forming an isolation region comprising a trench isolation region and a selective oxidation film region involved in a semiconductor integrated circuit device. A silicon oxide film is deposited on a surface o... | 12/12/1995 |
| 5472905 | Method for forming a field oxide layer of a semiconductor integrated circuit device A method for forming a field oxide layer of a highly integrated semiconductor device comprises the steps of depositing a pad oxide layer and a nitride layer over a substrate, removing the nitride layer over a field region, forming spacers on the side wall... | 12/05/1995 |
| 5472904 | Thermal trench isolation A process useful for isolating active areas of semiconductor devices in which an isolation trench is created in a substrate, the isolation trench being lined with an oxidation barrier and filled with a thick film. An oxidation step is performed in which t... | 12/05/1995 |
| 5470782 | Method for manufacturing an integrated circuit arrangement A trench structure is produced in a substrate wafer in a two-step trench process. A trench mask is produced in a first etching step and the trench structure is realized in the substrate wafer in a second etching step. An auxiliary lithography structure is... | 11/28/1995 |
| 5470780 | Method of fabricating poly-silicon resistor The method of fabricating a poly-silicon resistor includes a step for providing a dopant gas and a nitrous oxide gas as well as a silane gas to thereby deposit a silicon layer on a substrate by chemical vapor deposition under a deposition temperature not ... | 11/28/1995 |
| 5468676 | Trench isolation structure and method for forming An isolation structure is disclosed which isolates an active region (24) from other proximate active regions. The isolation structure utilizes the combination of a LOCOS structure (26) comprising bird's beak structure (26a) and (26b). A trench (34) is for... | 11/21/1995 |
| 5468677 | Isolation structure of semiconductor device and method for forming the same An isolation structure of a semiconductor device including a channel stop diffusion region selectively formed on a portion of a single crystalline silicon substrate disposed beneath an edge of a field oxide film formed on the substrate, thereby capable of... | 11/21/1995 |
| 5468686 | Method of cleaning an etching chamber of a dry etching system In a dry etching system, a method of cleaning an etching chamber allows a series of steps of introducing a wafer, selectively dry-etching an aluminum film provided on the wafer, cleaning the etching chamber by etching gas containing oxygen gas and capable... | 11/21/1995 |
| 5466632 | Field oxide with curvilinear boundaries and method of producing the same A method of forming field oxides with curvilinear boundaries between active regions on a substrate in an integrated circuit (IC) so that the stresses induced in the active regions due to the formation of field oxide can be reduced. Problems like junction ... | 11/14/1995 |
| 5466303 | Semiconductor device and manufacturing method therefor A semiconductor device, which can easily form hyper abrupt junction type junction having a desired depletion layer width or transition region width, is disclosed. A silicon oxide film is formed on the mirror polished side surface of a P-type semiconductor... | 11/14/1995 |
| 5459104 | Process for production of semiconductor substrate The invention relates to a process of production of a semiconductor substrate by binding etc. involving the direct polishing of an oxide film with step differences. A silicon oxide film (3) having step differences is formed on at least one surface of an a... | 10/17/1995 |
| 5459107 | Method of obtaining high quality silicon dioxide passivation on silicon carbide and resulting passivated structures A method of obtaining high quality passivation layers on silicon carbide surfaces by oxidizing a sacrificial layer of a silicon-containing material on a silicon carbide portion of a device structure to substantially consume the sacrificial layer to produc... | 10/17/1995 |
| 5455194 | Encapsulation method for localized oxidation of silicon with trench isolation A method for the fabrication of a trench isolation region (44) includes the deposition of first, second, and third oxidizable layers (28, 34, 42). The first oxidizable layer (28) is deposited to overlie the surface of a trench (12) formed in a semiconduct... | 10/03/1995 |
| 5455193 | Method of forming a silicon-on-insulator (SOI) material having a high degree of thickness uniformity A silicon-on-insulator (SOI) material is formed from a bonded silicon wafer structure which includes, in order, a silicon handler substrate, an insulating oxide layer, a silicon device layer, a highly-doped silicon etch stop layer, and a top silicon subst... | 10/03/1995 |
| 5455204 | Thin capacitor dielectric by rapid thermal processing The invention provides a continuous rapid thermal process for forming a substantially uniform oxynitride film on fingered three-dimensional silicon structures comprising cleaning of the silicon substrate and growth of silicon oxide in the presence of ozon... | 10/03/1995 |
| 5451547 | Method of manufacturing semiconductor substrate Disclosed is a method of manufacturing a semiconductor substrate by bonding two silicon crystalline wafers, and particularly, to a method of manufacturing a semiconductor substrate capable of reduced electrical resistance at the bonding interface. In the ... | 09/19/1995 |
| 5449638 | Process on thickness control for silicon-on-insulator technology A method for forming a thin, uniform top silicon layer using bonded-wafer SOI technology is described. A dielectric layer is formed on a first surface of a first silicon substrate. A trench is formed in a first surface of a second silicon substrate. A pol... | 09/12/1995 |
| 5447884 | Shallow trench isolation with thin nitride liner A method of forming shallow trench isolation with a nitride liner layer for devices in integrated circuits solves a problem of recessing the nitride liner that led to unacceptable voids in the trench filler material by using a liner thickness of less than... | 09/05/1995 |
| 5447885 | Isolation method of semiconductor device In a method for forming an isolation region in a semiconductor device, after forming a first oxide film and a silicon film on a semiconductor substrate, an oxidation-blocking film is formed on the silicon film. Then, a high-temperature heat treatment proc... | 09/05/1995 |
