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| 8184499 | Semiconductor memory apparatus |
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| 8179736 | Antifuses and program circuits having the same |
| 8179724 | Sensing for memory read and program verify operations in a non-vo... |
| 8179739 | Semiconductor device and its manufacturing method |
| 8179722 | Page buffer circuit and nonvolatile memory device |
| 8176256 | Cache regions |
| 8174892 | Increased NAND flash memory read throughput |
| 8176294 | Reducing storage expansion of a virtual machine operating system |
| 8159882 | Nonvolatile semiconductor memory device and memory system |
| 8156301 | Method and apparatus for synchronizing a physical machine with a ... |
| 8154906 | Memory cells, memory cell programming methods, memory cell readin... |
| 8154921 | Dynamic and adaptive optimization of read compare levels based on... |
| 8151038 | SSD with a channel multiplier |
| 8149624 | Method and apparatus for reducing read disturb in memory |
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| 8145857 | Control of access to an external storage device |
| 8135912 | System and method of increasing cache size |
| 8134869 | Semiconductor memory having electrically erasable and programmabl... |
| RE43222 | Semiconductor integrated circuit device |
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| 8125819 | Asymmetric write current compensation using gate overdrive for re... |
| 8125810 | Low power ternary content-addressable memory (TCAM) |
| 8125836 | Verifying an erase threshold in a memory device |
| 8125831 | Sensing against a reference cell |
| 8111550 | M+N bit programming and M+L bit read for M bit memory cells |
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| 8111544 | Programming MRAM cells using probability write |
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| 8102723 | Memory device bit line sensing system and method that compensates... |
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| 8098513 | Memory array with read reference voltage cells |
| 8098539 | Hybrid single and dual channel DDR interface scheme by interleavi... |
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| 8098454 | Manufacturing method of hermetic connection terminal used in a di... |