Quotables
"What, sir, would you make a ship sail against the wind and currents by lighting a bonfire under her deck? I pray you, excuse me, I have not the time to listen to such nonsense."
Napoleon Bonaparte ; When told of the Robert Fulton steamboat
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| Number | Title | Issue Date |
| 7185072 | Topology information automatic configuration method and its topology information automatic configuration system A topology information automatic configuration method for configuring topology information indicating how to connect each equipment, based on configuration information, including IP address and subnet mask, established for every interface of each equipment connected... | 02/27/2007 |
| 7177899 | Framework system Disclosed is a framework system improved such that flow of complex business logic for processing a variety of messages may be easily defined and changed without need for programming. Messaging service(s) 15 may relay message(s) between client(s) 11, 13... | 02/13/2007 |
| 7176506 | High frequency chip packages with connecting elements A radio frequency chip package is formed by assembling a connecting element such as a circuit board or flexible circuit tape having chips thereon with a bottom plane element such as a lead frame incorporating a large thermally-conductive plate and leads projecting u... | 02/13/2007 |
| 7175675 | Method of dyeing a plastic article In the method of the present invention a plastic article (e.g., a molded article of thermoplastic polycarbonate) is immersed at least partially in a dye bath which includes one or more dyes, water, at least one carrier, and at least one diol. The dye bath contains: ... | 02/13/2007 |
| 7176483 | Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions An electrical junction that includes a semiconductor (e.g., C, Ge, or an Si-based semiconductor), a conductor, and an interface layer disposed therebetween. The interface layer is sufficiently thick to depin a Fermi level of the semiconductor, yet sufficiently thin ... | 02/13/2007 |
| 7177898 | Multiple-processor information processing system A multiple-processor information processing system is capable of reducing adverse influence of overload of a given communication process on other communication processes. In this multiple-processor information processing system, a virtual IP address definition secti... | 02/13/2007 |
| 7176480 | Light-emitting semiconductor device having a quantum well active layer, and method of fabrication A light-emitting diode has a low-resistivity silicon substrate on which there are laminated a buffer layer, an n-type lower confining layer, an active layer of multiple quantum well configuration, and a p-type upper confining layer. The active layer is constituted o... | 02/13/2007 |
| 7173300 | Magnetoresistive element, method for making the same, and magnetic memory device incorporating the same A magnetoresistive element including a free layer having rotatable magnetization, in which information is recorded in the magnetoresistive element by the rotation of the magnetization of the free layer, is provided. The free layer is a laminate that includes at leas... | 02/06/2007 |
| 7173275 | Thin-film transistors based on tunneling structures and applications A hot electron transistor includes an emitter electrode, a base electrode, a collector electrode, and a first tunneling structure disposed and serving as a transport of electrons between the emitter and base electrodes. The first tunneling structure includes at leas... | 02/06/2007 |
| 7174368 | Encrypted e-mail reader and responder system, method, and computer program product A system, method, and computer program product for providing a encrypted email reader and responder is described. The method of distributing and initializing an encrypted electronic mail (email) software application for exchanging secure email, can include: obtainin... | 02/06/2007 |
| 7170123 | Antiferromagnetically stabilized pseudo spin valve for memory applications The invention relates to improving the switching reliability of a magnetic memory cell in a magnetic random access memory (MRAM). Embodiments of the invention add an antiferromagnet to a magnetic memory cell. An antiferromagnetic layer can be formed adjacent to a so... | 01/30/2007 |
| 7170771 | Method of reading a data bit including detecting conductivity of a volume of alloy exposed to an electron beam Alloy memory structures and methods are disclosed wherein a layer or volume of alloy material changes conductivity subsequent to introduction of a electron beam current-induced change in phase of the alloy, the conductivity change being detected using current detect... | 01/30/2007 |
| 7166135 | Product and method for treating cotton A process for producing an ionic crosslinked fibrous material, such as a cellulosic fabric, paper, or other substrate, wherein the ionic crosslinked fiber exhibits an increased wrinkle resistance angle. A process for producing a cationized chitosan, wherein the cati... | 01/23/2007 |
| 7167896 | Apparatus and method for creating and supplying a program via communication network A program creation/supply apparatus connects with a client apparatus via a communication network, and prompts the client apparatus to select one or items of content and enter desired additional information in correspondence with the selected items of content. Progra... | 01/23/2007 |
| 7167229 | Liquid crystal display element and projection display device An active matrix drive type liquid crystal display element capable of preventing deterioration of display capability caused by a stripe domain, and a projection type display device using the liquid crystal display element, by which there is provided a projection typ... | 01/23/2007 |
| 7166481 | Method for evaluating and modifying solder attach design for integrated circuit packaging assembly A method of reducing a likelihood that a die pad will be delaminated from a die in an integrated circuit die package for a structure design during an attachment of a heat sink member to the die pad using solder, is provided. A sample structure of the structure desig... | 01/23/2007 |
| 7164161 | Method of formation of dual gate structure for imagers A device, as in an integrated circuit, includes diverse components such as transistors and capacitors. After conductive layers for all types of components are produced, a silicide layer is provided over conductive layers, reducing resistance. The device can be an im... | 01/16/2007 |
| 7161201 | Antiferromagnetically stabilized pseudo spin valve for memory applications The invention relates to improving the switching reliability of a magnetic memory cell in a magnetic random access memory (MRAM). Embodiments of the invention add an antiferromagnet to a magnetic memory cell. An antiferromagnetic layer can be formed adjacent to a so... | 01/09/2007 |
| 7157750 | Molecular memory device A novel memory cell is provided with an active region including a molecular system and ionic complexes distributed in the molecular system. A pair of write electrodes are arranged for writing information to the memory cell. The active region is responsive to an elec... | 01/02/2007 |
| 7157767 | Semiconductor memory element, semiconductor memory arrangement, method for fabricating a semiconductor memory element and method for operating a semiconductor memory element A semiconductor memory element has a substrate, in which a source region and a drain region are formed, a floating gate electrically insulated from the substrate, and a tunnel barrier arrangement, via which charging or discharging of the floating gate can be perform... | 01/02/2007 |
| 7155494 | Mapping between virtual local area networks and fibre channel zones A method for transferring information between a first network comprising first-network-stations operating under an Ethernet protocol and a second network comprising second-network-stations operating under a Fibre Channel (FC) protocol, including grouping the first-n... | 12/26/2006 |
| 7151294 | High density stepped, non-planar flash memory A first plurality of memory cells is in a first plane in a first column of the array. A second plurality of memory cells is in a second plane in the same column. The second plurality of memory cells are coupled to the first plurality of memory cells through a series... | 12/19/2006 |
| 7151274 | Dual panel type organic electroluminescent device An organic electroluminescent device includes first and second substrates facing each other and spaced apart from each other, each of the first and second substrates having a first region and a second region in a periphery of the first region; an array element on an... | 12/19/2006 |
| 7152120 | Remote copy system A remote copy system includes a first storage system including a first storage controller and a first data volume. The first storage controller is configured to control data access requests to the first data volume. The first storage system is configured to store wr... | 12/19/2006 |
| 7151055 | Technique for forming a gate electrode by using a hard mask The anisotropic etch process for forming circuit elements such as a gate electrode is accomplished by using a hard mask instead of a resist feature, thereby avoiding a complex resist trim process when critical dimensions are required, which are well below the resolu... | 12/19/2006 |
| 7148523 | Molecular rectifier device A rectifier device, based on a novel operation principle completely different from that of conventional molecular electronic devices, is made by coupling two or more molecules or molecule arrays (11) at certain joints. By making use of the phenomenon that tra... | 12/12/2006 |
| 7149707 | Method and apparatus for compensating a plurality of franchise participants in a multi-level sales force A method and apparatus for compensating a plurality of participants selling, leasing or managing property or originating loans. The method includes the steps of forming a multi-level sales force, collecting royalty fees from each participant, placing the collected f... | 12/12/2006 |
| 7148142 | System and method for imprint lithography to facilitate dual damascene integration in a single imprint act A system and method are provided to facilitate dual damascene interconnect integration in a single imprint step. The method provides for creation of a translucent imprint mold with three-dimensional features comprising the dual damascene pattern to be imprinted. The... | 12/12/2006 |
| 7141823 | Thin film transistor semiconductor device In a TFT with a GOLD structure, there is provided a structure which is able to improve an operating characteristic and reliability and reduce an off current value in order to reduce power consumption of a semiconductor device. The surface of LDD region (4) ov... | 11/28/2006 |
| 7138696 | Image pickup apparatus, radiation image pickup apparatus and radiation image pickup system An image pickup apparatus includes plural light receiving areas arranged two-dimensionally and a vertical scanning circuit composed of plural unit circuit stages arranged in the vertical direction and a horizontal scanning circuit composed of plural unit circuit sta... | 11/21/2006 |
| 7135715 | Co-doping for fermi level control in semi-insulating Group III nitrides Semi-insulating Group III nitride layers and methods of fabricating semi-insulating Group III nitride layers include doping a Group III nitride layer with a shallow level p-type dopant and doping the Group III nitride layer with a deep level dopant, such as a deep l... | 11/14/2006 |
| 7132683 | Dual purpose test structure for gate-body current measurement in PD/SOI and for direct extraction of physical gate length in scaled CMOS technologies A structure, for testing relative to an MOS transistor, closely resembles the MOS transistor of interest. For example, certain dimensions and a number of dopant concentrations typically are substantially the same in the test structure as found in corresponding eleme... | 11/07/2006 |
| 7132062 | Electrically conductive additive system and method of making same An electrically conductive additive system comprising carbon nanofibers and, optionally, electrically conductive particulate material mixed in a liquid component. The carbon nanofibers can be characterized by having a diameter between about 70 to about 200 nanometer... | 11/07/2006 |
| 7132676 | Photon source and a method of operating a photon source A photon source comprising a quantum dot comprising a confined conduction band energy level capable of being populated with at least one carrier and a confined valence band energy level capable of being populated by at least one carrier is provided, the source furth... | 11/07/2006 |
| 7126151 | Interconnected high speed electron tunneling devices An integrated circuit chip includes a formation of integrated layers configured to define at least one integrated electronic component. The integrated layers further define an integrated electron tunneling device, which includes first and second non-insulating layer... | 10/24/2006 |
| 7122433 | Method for manufacturing trench gate semiconductor device A device termination structure, and/or a gate bus-bar structure, and/or other end structure is provided for at least one group of cells in a cellular trench-gate semiconductor device, for example a power MOSFET. In this end structure, a conductive layer (11 | 10/17/2006 |
| 7119354 | Composition for forming porous film, porous film and method for forming the same, interlevel insulator film Provided is a coating liquid which can easily form a porous film having desirably controlled thickness by the method used for a usual semiconductor process, and having an excellent mesopore channel structure. Specifically provided is a composition for forming porous... | 10/10/2006 |
| 7118984 | Method for fabricating semiconductor component Electrode layers (1, 2) are arranged on both sides of a dielectric layer (3) facing each other so as to configure a capacitor. Lead electrodes (4, 5) are formed in the electrode layers (1, 2). A penetrating electrode (6) that is in... | 10/10/2006 |
| 7119409 | Organic el display In the case of a top emission structure color organic EL display in which are bonded together a substrate having thin film transistors formed thereon and a transparent substrate having color-converting filters formed thereon, an overcoat layer for adjusting the gap ... | 10/10/2006 |
| 7112826 | Single crystal GaN substrate semiconductor device Seeds are implanted in a regular pattern upon an undersubstrate. A GaN crystal is grown on the seed implanted undersubstrate by a facet growth method. The facet growth makes facet pits above the seeds. The facets assemble dislocations to the pit bottoms from neighbo... | 09/26/2006 |
