| Patent No. | Patent Title: |
| 8009781 | DTV receiver and method of processing signal in DTV receiver |
| 8005140 | Soft decision and iterative video coding for MPEG and H.264 |
| 8000423 | Adaptive sample rate converter |
| 7995656 | Scalable video coding with two layer encoding and single layer de... |
| 7978779 | Tone-interleaved coded modulation scheme for MIMO OFDM communicat... |
| 7970091 | Method for reducing spectral regrowth in a spectrally efficient d... |
| 7957459 | Symbol rate testing method based on signal waveform analysis |
| 7925261 | Methods and apparatus for resovling frequency errors during trans... |
| 7912168 | Wireless communication apparatus and method thereof |
| 7912151 | Post-distortion filter for reducing sensitivity to receiver nonli... |
| 7912132 | Moving image decoding apparatus |
| 7899143 | Adjustment mechanism for source synchronous strobe lockout |
| 7899141 | Receiver for receiving radio frequency signals |
| 7881396 | Method and apparatus for transmitting and receiving a preamble fo... |
| 7860190 | Multi-channel timing recovery system |
| 7856073 | Digital gain adjustment in a wireless receiver |
| 7839945 | Static and differential precoding codebook for MIMO systems |
| 7830972 | Method for allocating signals in multi-carrier system |
| 7792216 | Timing estimator in OQPSK demodulator |
| 7787570 | Polar loop radio frequency (RF) transmitter having increased dyna... |
| 7787527 | Precise dynamic hysteresis |
| 7787515 | Method and apparatus for generation of asynchronous clock for spr... |
| 7778375 | Clock generator and data recovery circuit using the same |
| 7773667 | Pseudo asynchronous serializer deserializer (SERDES) testing |
| 7760839 | Offset controllable spread spectrum clock generator apparatus |
| 7756197 | Built in self test (BIST) for high-speed serial transceivers |
| 7746946 | Performing a scan of diversity parameter differences |
| 7746940 | Method and apparatus for transmitting a signal in a communication... |
| 7738572 | Orthogonal frequency division multiplexing (OFDM) receiver capabl... |
| 7733985 | Phase-locked loop circuit with a mixed mode loop filter |
| 7724636 | Asymmetry compensator for partial response maximum likelihood (PR... |
| 7724854 | Synchronization methodology for systems employing data pull flow ... |
| 7720168 | Systems and methods for coding in broadband wireless communicatio... |
| 7711063 | Digital transmitter with data stream transformation circuitry |
| 7702028 | Method of transmitting preamble for synchronization in a MIMO-OFD... |
| 7697648 | Asymmetric error correction device and method thereof, and optica... |
| 7693212 | Methods and apparatus for frequency rectification |
| 7684529 | Interference rejection in wireless networks |
| 7684533 | Phase lock loop jitter measurement |
| 7680235 | VCO circuit, PLL circuit using VCO circuit, and data recording ap... |
Famous Patents 
PatentStorm News
