| Patent No. | Patent Title: |
| 7464130 | Logic circuit and method for performing AES MixColumn transform |
| 7464131 | Logical calculation circuit, logical calculation device, and logi... |
| 7464128 | Methods and apparatus for single stage Galois field operations |
| 7461108 | Barrel shift device |
| 7457838 | Methods and apparatus for performing calculations using reduced-w... |
| 7454451 | Method for finding local extrema of a set of values for a paralle... |
| 7451174 | Multi-level soft detector-quantizer |
| 7451171 | Systems, methods and computer program products for hardware assis... |
| 7447719 | Quantum computing method and quantum computer |
| 7447720 | Method for finding global extrema of a set of bytes distributed a... |
| 7447721 | Method and apparatus for generating true random numbers by way of... |
| 7444367 | Floating point status information accumulation circuit |
| 7437391 | Numerically controlled oscillator and method of operation |
| 7437398 | Pattern matching architecture |
| 7437402 | Low-power, high-speed word comparator |
| 7437399 | Method and apparatus for averaging parity protected binary number... |
| 7437395 | FFT operating apparatus of programmable processors and operation ... |
| 7433905 | Device and method for processing digital values in particular in ... |
| 7433909 | Processing architecture for a reconfigurable arithmetic node |
| 7430577 | Computationally efficient mathematical engine |
| 7430575 | One-dimensional fourier transform program, method and apparatus |
| 7428561 | Apparatus and method for scaling digital data information |
| 7428564 | Pipelined FFT processor with memory address interleaving |
| 7428567 | Arithmetic unit for addition or subtraction with preliminary satu... |
| 7428563 | Apparatus and method for selectively performing Fast Hadamard Tra... |
| 7426529 | Processor and method for a simultaneous execution of a calculatio... |
| 7426527 | Random number generator and method for generating a random number |
| 7424503 | Pipelined accumulators |
| 7424508 | Self-timed carry look-ahead adder and summation method thereof |
| 7424501 | Nonlinear filtering and deblocking applications utilizing SIMD si... |
| 7424504 | Arithmetic processor for accomodating different field sizes |
| 7424507 | High speed, low power, pipelined zero crossing detector that util... |
| 7424505 | Method and apparatus for performing multiply-add operations on pa... |
| 7421463 | Random sequence generating apparatus, encryption/decryption appar... |
| 7421464 | System and method for introducing dither for reducing spurs in di... |
| 7418469 | Method and apparatus for adaptive real-time signal conditioning, ... |
| 7415495 | Selective filter having linear phase |
| 7412473 | Arithmetic circuitry for averaging and methods thereof |
| 7412471 | Discrete filter having a tap selection circuit |
| 7409417 | Polyphase filter with optimized silicon area |
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