| Patent No. | Patent Title: |
| 5714416 | Semiconductor memory device and write-once, read-only semiconduct... |
| 5268321 | Method of making DRAM cell having improved radiation protection |
| 5075249 | Method of making a BIC memory cell having contact openings with s... |
| 5061651 | Method of making dram cell with stacked capacitor |
| 5047362 | Method of making large-scale EPROM memory with a checker board pa... |
| 5030586 | Method for manufacturing semiconductor memory device having impro... |
| 5025741 | Method of making semiconductor integrated circuit device with ... |
| 5017506 | Method for fabricating a trench DRAM |
| 5008212 | Selective asperity definition technique suitable for use in fabri... |
| 5006481 | Method of making a stacked capacitor DRAM cell |
| 5001078 | Method of making semiconductor memory device |
| 5001081 | Method of manufacturing a polysilicon emitter and a polysilicon g... |
| 4997783 | Static ram cell with trench pull-down transistors and buried-laye... |
| 4997781 | Method of making planarized EPROM array |
| 4997779 | Method of making asymmetrical gate field effect transistor |
| 4992394 | Self aligned registration marks for integrated circuit fabricatio... |
| 4987091 | Process of fabricating dynamic random access memory cell |
| 4983226 | Defect free trench isolation devices and method of fabrication |
| 4980306 | Method of making a CMOS device with trench isolation device |
| 4980309 | Method of making high density EEPROM |
| 4980310 | Method of making a trench dram cell |
| 4978634 | Method of making trench DRAM cell with stacked capacitor and buri... |
| 4978635 | Method of making a semiconductor memory device |
| 4977099 | Method for fabricating semiconductor memory device |
| 4977102 | Method of producing layer structure of a memory cell for a dynami... |
| 4975383 | Method for making an electrically erasable programmable read only... |
| 4971924 | Metal plate capacitor and method for making the same |
| 4971921 | Semiconductor device and method of manufacturing the same |
| 4970173 | Method of making high voltage vertical field effect transistor wi... |
| 4966867 | Process for forming self-aligned, metal-semiconductor contacts in... |
| 4963502 | Method of making oxide-isolated source/drain transistor |
| 4960724 | Method for deleting unused gates and method for manufacturing ... |
| 4960726 | BiCMOS process |
| 4957877 | Process for simultaneously fabricating EEPROM cell and flash EPRO... |
| 4957878 | Reduced mask manufacture of semiconductor memory devices |
| 4957881 | Formation of self-aligned contacts |
| 4956310 | Semiconductor memory device and fabricating method thereof |
| 4950619 | Method for the fabrication of a high resistance load resistor uti... |
| 4950617 | Method of manufacturing semiconductor device |
| 4950620 | Process for making integrated circuit with doped silicon dioxide ... |
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