| Patent No. | Patent Title: |
| 6087727 | Misfet semiconductor device having different vertical levels |
| 5834849 | High density integrated circuit pad structures |
| 5831337 | Vertical-type transistor device, having a bump electrode that has... |
| 5821563 | Semiconductor device free from reverse leakage and throw leakage |
| 5814841 | Self-scanning light-emitting array |
| 5793113 | Multilevel interconnection structure for semiconductor devices |
| 5780928 | Electronic system having fluid-filled and gas-filled thermal cool... |
| 5777345 | Multi-chip integrated circuit package |
| 5763940 | Tape mounted semiconductor apparatus |
| 5742100 | Structure having flip-chip connected substrates |
| 5739556 | Pressure contact housing for semiconductor components |
| 5739586 | Heat sink assembly including a printed wiring board and a metal c... |
| 5731634 | Semiconductor device having a metal film formed in a groove in an... |
| 5731602 | Laser diode package with anti-reflection and anti-scattering coat... |
| 5731633 | Thin multichip module |
| 5726498 | Wire shape conferring reduced crosstalk and formation methods |
| 5726501 | Semiconductor device having a solder drawing layer |
| 5723901 | Stacked semiconductor device having peripheral through holes |
| 5723899 | Semiconductor lead frame having connection bar and guide rings |
| 5723907 | LOC SIMM |
| 5717255 | Semiconductor device |
| 5717246 | Hybrid frame with lead-lock tape |
| 5717248 | Cooling and screening device having contact pins for an integrate... |
| 5714795 | Semiconductor device utilizing silicide reaction |
| 5712508 | Strapping via for interconnecting integrated circuit structures |
| 5710460 | Structure for reducing microelectronic short circuits using spin-... |
| 5708294 | Lead frame having oblique slits on a die pad |
| 5708298 | Semiconductor memory module having double-sided stacked memory ch... |
| 5708297 | Thin multichip module |
| 5708304 | Semiconductor device |
| 5705851 | Thermal ball lead integrated package |
| 5705858 | Packaging structure for a hermetically sealed flip chip semicondu... |
| 5703395 | Electronic memory device having a non-peripheral contact for read... |
| 5703401 | Miniature semiconductor device for surface mounting |
| 5703402 | Output mapping of die pad bonds in a ball grid array |
| 5693984 | Semiconductor device having a heat radiator |
| 5686761 | Production worthy interconnect process for deep sub-half micromet... |
| 5684331 | Multilayered interconnection of semiconductor device |
| 5684332 | Method of packaging a semiconductor device with minimum bonding p... |
| 5679982 | Barrier against metal diffusion |
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