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3M employee and church chorister Art Fry needed something to temporarily mark pages in his hymnal. He was in luck because his colleague, Spencer Silver, accidentally developed a glue that was too weak for other purposes. After initially discouraging consumer response, Post-it Notes became a hit in 1979.
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| Number | Title | Issue Date |
| 8145827 | Memory device with non-volatile memory buffer A memory device includes a nonvolatile memory and a controller. The nonvolatile memory includes a storage area having a plurality of memory blocks each including a plurality of nonvolatile memory cells, and a buffer including a plurality of nonvolatile memory cells ... | 03/27/2012 |
| 8131953 | Tracking store ordering hazards in an out-of-order store queue A method and system for processing data. In one embodiment, the method includes receiving a first store and receiving a second store subsequent to the first store. The method also includes generating a pointer that points to the last store that needs to retire befor... | 03/06/2012 |
| 8131966 | System and method for storage structure reorganization A method and system to reorganize a storage structure by generating correlation data that represents relationships between storage blocks of a storage structure, generating a block allocation scheme for the storage structure, determining a block reorganization opera... | 03/06/2012 |
| 8112593 | System and method for improving cluster performance A system for providing improved cluster operation performance comprises a storage system and a cluster system communicatively coupled to the storage system. The cluster system comprises an active node and a plurality of passive nodes. The active node comprises a sto... | 02/07/2012 |
| 8112589 | System for caching data from a main memory with a plurality of cache states To ensure efficient access to a memory whose writing process is slow. There is provided a storage device for caching data read from a main memory and data to be written in the main memory, comprises a cache memory having a plurality of cache segments, one or more ca... | 02/07/2012 |
| 8108644 | Storage control apparatus, storage system, and virtual volume control method The storage control apparatus of the present invention saves a table for managing a virtual volume in a pool and keeps the state of the table in the latest state. A first dynamic mapping table (DMT) that manages a first virtual volume is saved in a first pool. Upon ... | 01/31/2012 |
| 8099557 | Push for sharing instruction In one embodiment, a system comprises a first processor, a main memory system, and a cache hierarchy coupled between the first processor and the main memory system. The cache hierarchy comprises at least a first cache. The first processor is configured to execute a ... | 01/17/2012 |
| 8095729 | Disk drive array synchronization via short-range RF signaling A plurality of disk drives in a disk drive array are synchronized. A synchronization signal is generated at a master disk drive. The synchronization signal is encoded as a radio frequency signal for transmission over a radio frequency network in communication with t... | 01/10/2012 |
| 8074031 | Multi-processor circuit with shared memory banks A plurality of processors in a multiprocessor circuit is electrically connected to a plurality of independently addressable memory banks via a connection circuit. The connection circuit is arranged to forward addresses from a combination of the processors to address... | 12/06/2011 |
| 8069303 | Method and apparatus for controlling memory precharge operation A memory controller sequentially holds access requests including access addresses. A semiconductor memory includes a plurality of banks each having a plurality of pages. The memory controller decides page hit/page miss of the bank corresponding to each of the held a... | 11/29/2011 |
| 8069319 | Sharing memory resources of wireless portable electronic devices It is not uncommon for two or more wireless-enabled devices to spend most of their time in close proximity to one another. For example, a person may routinely carry a personal digital assistant (PDA) and a portable digital audio/video player, or a cellphone and a PD... | 11/29/2011 |
| 8055832 | Management of memory blocks that directly store data files Host system data files are written directly to a large erase block flash memory system with a unique identification of each file and offsets of data within the file but without the use of any intermediate logical addresses or a virtual address space for the memory. ... | 11/08/2011 |
| 8046522 | Use of a direct data file system with a continuous logical address space interface and control of file address storage in logical blocks Data files are assigned addresses within one or more logical blocks of a continuous logical address space interface (LBA interface) of a usual type of flash memory system with physical memory cell blocks. This assignment may be done by the host device which typicall... | 10/25/2011 |
| 8032711 | Prefetching from dynamic random access memory to a static random access memory Embodiments of the invention are generally directed to systems, methods, and apparatuses for prefetching from a dynamic random access memory (DRAM) to a static random access memory (SRAM). In some embodiments, prefetch logic receives a prefetch hint associated with ... | 10/04/2011 |
| 8028136 | Retaining disk identification in operating system environment after a hardware-driven snapshot restore from a snapshot-LUN created using software-driven snapshot architecture A program, method and system are disclosed for managing a snapshot backup restore through a hardware snapshot interface, i.e. a hardware-driven snapshot restore, based upon a software-driven snapshot backup, e.g. created with software such as volume shadow copy serv... | 09/27/2011 |
| 8024513 | Method and system for implementing dynamic refresh protocols for DRAM based cache A method for implementing dynamic refresh protocols for DRAM based cache includes partitioning a DRAM cache into a refreshable portion and a non-refreshable portion, and assigning incoming individual cache lines to one of the refreshable portion and the non-refresha... | 09/20/2011 |
| 8019934 | Optical disk drive including non-volatile memory and method of operating the same An optical disk drive includes a non-volatile memory. The optical disk drive is booted based on driving information stored in the non-volatile memory. When a write command is received from a host, the optical disk drive stores data to be recorded in an optical mediu... | 09/13/2011 |
| 8019938 | Apparatus, system, and method for solid-state storage as cache for high-capacity, non-volatile storage An apparatus, system, and method are disclosed for solid-state storage as cache for high-capacity, non-volatile storage. The apparatus, system, and method are provided with a plurality of modules including a cache front-end module and a cache back-end module. The ca... | 09/13/2011 |
| 8015344 | Apparatus and method for processing data of flash memory Provided are an apparatus and method for processing data of flash memory. The apparatus includes a user requesting unit to request a data operation using a predetermined logical address, a transformation unit to transform the logical address into a physical address,... | 09/06/2011 |
| 8015361 | Memory-centric page table walker The page table walker is moved from its conventional location in the memory management unit associated with the data processor to a location in main memory i.e. the main memory controller. As a result, an implementation is provided wherein the processing of requests... | 09/06/2011 |
| 8010753 | Systems and methods for temporarily transferring use of portions of partitioned memory between host computers A method for operating a storage system, consisting of performing an allocation of respective partitions of a physical storage resource of the storage system to respective hosts of the storage system. The method also includes changing the allocation while permitting... | 08/30/2011 |
| 8010754 | Memory micro-tiling According to one embodiment, a memory controller is disclosed. The memory controller includes assignment logic and a transaction assembler. The assignment logic receives a request to access a memory channel. The transaction assembler combines the request into one or... | 08/30/2011 |
| 8010752 | Performing initialization for non access-selected memory device supporting multimediacard (MMC) interface A storage interfacing method and apparatus for a mobile terminal are disclosed. The storage interfacing method utilizes a plurality of storage devices. The method includes identifying the storage devices, detecting an occurrence of an access request event to one of ... | 08/30/2011 |
| 8006058 | Method and securing electronic device data processing A method for securing electronic device processes against attacks (e.g. side channel attacks) during the processing of sensitive and/or confidential data by a Central Processing Unit (CPU) to the volatile memory (e.g. RAM) of an electronic device such as, for exampl... | 08/23/2011 |
| 8006043 | System and method for maintaining memory page sharing in a virtual environment In a virtualized system using memory page sharing, a method is provided for maintaining sharing when Guest code attempts to write to the shared memory. In one embodiment, virtualization logic uses a pattern matcher to recognize and intercept page zeroing code in the... | 08/23/2011 |
| 8001334 | Bank sharing and refresh in a shared multi-port memory device A method and system for sharing banks of memory in a multi-port memory device between components is provided. The multi-port memory device includes multiple ports to which components of a system are attached, and multiple banks of memory within the multi-port memory... | 08/16/2011 |
| 8001342 | Method for storing and restoring persistent memory content and virtual machine state information A method that can simplify a recovery of a system. The method includes storing multiple types of information, and includes: a first stage of storing information representative of a content of a persistent memory entity at a certain point in time; and a second stage ... | 08/16/2011 |
| 7996602 | Parallel memory device rank selection A translator of an apparatus in an example selects one or more ranks of parallel memory devices from a plurality of available ranks of parallel memory devices in a plurality of double data rate registered and/or unbuffered dual in-line memory modules (DDR registered... | 08/09/2011 |
| 7996644 | Fair sharing of a cache in a multi-core/multi-threaded processor by dynamically partitioning of the cache An apparatus and method for fairly accessing a shared cache with multiple resources, such as multiple cores, multiple threads, or both are herein described. A resource within a microprocessor sharing access to a cache is assigned a static portion of the cache and a ... | 08/09/2011 |
| 7996603 | DRAM controller that forces a refresh after a failed refresh request A refresh controller transmits two refresh request signals of a first request signal which indicates a time at which a refresh operation of a DRAM may be performed and a second request signal which indicates a time at which a refresh operation of the DRAM must be pe... | 08/09/2011 |
| 7991976 | Permanent pool memory management method and system A method, system, and computer program manager for a computing system memory in the operation of a computing process. At least one memory segment provides memory resources for the computing process, which includes a plurality of memory objects, each of the memory ob... | 08/02/2011 |
| 7991977 | Advanced processor translation lookaside buffer management in a multithreaded system An advanced processor comprises a plurality of multithreaded processor cores each having a data cache and instruction cache. A data switch interconnect is coupled to each of the processor cores and configured to pass information among the processor cores. A messagin... | 08/02/2011 |
| 7991948 | Optimizing execution of I/O requests for a disk drive in a computing system Methods, apparatus, and products are disclosed for optimizing execution of Input/Output (‘I/O’) requests for a disk drive in a computing system that include: receiving I/O requests specifying disk blocks of the disk drive for access, each disk block specified by... | 08/02/2011 |
| 7984259 | Reducing load imbalance in a storage system The present invention provides a system, method, and computer program product for reducing load imbalance in a storage system having a plurality of storage devices organized in one or more RAIDs for storing data by moving data from heavily-loaded storage devices to ... | 07/19/2011 |
| 7984257 | System for protecting supervisor mode data from user code A system for protecting supervisor mode data from user code having a processor which implements a register window architecture supporting as separate window stacks for supervisor and user modes with a transition window in one of the window stacks set with at least o... | 07/19/2011 |
| 7984251 | Autonomic storage provisioning to enhance storage virtualization infrastructure availability The invention is an improvement to a storage virtualization system that enables the system to determine a class of service for potential storage devices and allows a user, administrator, or application to select a minimum class of service for any given type of data.... | 07/19/2011 |
| 7984263 | Structure for a memory-centric page table walker A design structure embodied in a machine readable storage medium for at least one of designing, manufacturing, and testing a design is provided. The design structure includes a page table walker. The page table walker is moved from its conventional location in the m... | 07/19/2011 |
| 7984253 | Architecture for virtualization of networked storage resources An architecture for managing a plurality of storage area networks including a plurality of data storage volumes and one or more hosts, wherein the volumes are in a switched storage network in the storage area networks the architecture comprising one or more processo... | 07/19/2011 |
| 7970993 | Rotating parity redundant array of independent disk and method for storing parity the same A rotating parity redundant array of independent disk (RAID) and a method for storing parity of the same are provided. The rotating parity RAID comprises a first˜a third disk. The first disk has A1˜Am blocks for storing A1˜Am... | 06/28/2011 |
| 7970998 | Parallel caches operating in exclusive address ranges A cache memory of the present invention includes a second cache memory that is operated in parallel with a first cache memory, a judgment unit which, when a cache miss occurs in both of the first cache memory and the second cache memory, makes a true or false judgme... | 06/28/2011 |
