U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

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Examiner: Mulpuri, Savitri


Primary examiner statistics: 794 patents; average approval time: 793 days
Assistant examiner statistics: 4 patents; average approval time: 364 days

Patents as Primary Examiner (view all)

Patent No. Patent Title:
8193084 Method of manufacturing semiconductor device
8088656 Fabricating ESD devices using MOSFET and LDMOS
8085964 Apparatus and methods for generating pressure waves
8034648 Epitaxial regrowth in a distributed feedback laser
8026150 Semiconductor device manufacturing method and storage medium
8021988 Method of forming semiconductor device and semiconductor device
8012773 Method for manufacturing liquid discharge head
8008184 Semiconductor device manufacturing method, semiconductor manufact...
8003482 Methods of processing semiconductor substrates in forming scribe ...
7998775 Silicon undercut prevention in sacrificial oxide release process ...
7994041 Method of manufacturing stacked semiconductor package using impro...
7989323 Doping method
7989824 Method of forming a dielectric layer on a semiconductor light emi...
7989316 Method of manufacturing semiconductor device
7989315 Method for manufacturing semiconductor device
7985636 Method for fabricating low temperature poly-silicon thin film tra...
7985647 Method of manufacturing nonvolatile memory device
7981749 MOS structures that exhibit lower contact resistance and methods ...
7981800 Shallow trench isolation structures and methods for forming the s...
7977139 Method for manufacturing CIS based thin film solar cell device
7977741 Manufacturing method of flexible semiconductor device and flexibl...
7977241 Method for fabricating highly reliable interconnects
7972940 Wafer processing
7972880 Method for fabricating a liquid crystal display device and an LCD...
7968382 Method of manufacturing semiconductor device
7964456 Method of fabricating polysilicon thin film and thin film transis...
7964463 Method for fabricating semiconductor device including vertical ch...
7960208 Wafer level hermetic bond using metal alloy with raised feature
7955874 Method of producing bonded silicon wafer
7955885 Methods of forming packaged micro-electromechanical devices
7955872 Manufacturing method of semiconductor integrated circuit device u...
7947527 Method for metallization of a semiconductor device
7939427 Process for fabricating a substrate of the silicon-on-insulator t...
7935583 Fabrication method of pixel structure
7927888 Method to fabricate a chip for the detection of biological elemen...
7927916 Optic wafer with reliefs, wafer assembly including same and metho...
7923319 Method for manufacturing a semiconductor integrated circuit devic...
7923290 Integrated circuit packaging system having dual sided connection ...
7923837 Microelectronic device patterned by ablating and subsequently sin...
7919334 MRAM

Patents as Assistant Examiner

Patent No. Patent Title:
5360753 Manufacturing method for a semiconductor isolation region
5352615 Denuding a semiconductor substrate
5348893 Method for treatment of semiconductor wafer
5308785 Isolation technique for silicon germanium devices
 
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