| Patent No. | Patent Title: |
| 7971044 | Link stack repair of erroneous speculative update |
| 7831806 | Determining target addresses for instruction flow changing instru... |
| 7818549 | Event driven digital signal processor with time constraints |
| 7805592 | Early resolving instructions |
| 7802075 | Synchronized high-assurance circuits |
| 7793082 | Latch to block short path violation |
| 7793073 | Method and apparatus for indirectly addressed vector load-add-sto... |
| 7788467 | Methods and apparatus for latency control in a multiprocessor sys... |
| 7788472 | Instruction encoding within a data processing apparatus having mu... |
| 7743232 | Multiple-core processor with hierarchical microcode store |
| 7725683 | Apparatus and method for power optimized replay via selective rec... |
| 7725690 | Distributed dispatch with concurrent, out-of-order dispatch |
| 7676653 | Compact instruction set encoding |
| 7454594 | Processor for realizing software pipelining with a SIMD arithmeti... |
| 7434035 | Method and system for processing instructions in grouped and non-... |
| 7421568 | Power saving methods and apparatus to selectively enable cache bi... |
| 7421565 | Method and apparatus for indirectly addressed vector load-add -st... |
| 7421570 | Method for managing a microprocessor stack for saving contextual ... |
| 7418577 | Fail instruction to support transactional program execution |
| 7415600 | Microprocessor that carries out context switching by shifting con... |
| 7412586 | Switch memory architectures |
| 7386705 | Method for allocating processor resources and system for encrypti... |
| 7383428 | Method, apparatus and computer program product for implementing a... |
| 7380109 | Apparatus and method for providing extended address modes in an e... |
| 7370159 | Microprocessor having an extended addressable space |
| 7366873 | Indirectly addressed vector load-operate-store method and apparat... |
| 7334110 | Decoupled scalar/vector computer architecture system and method |
| 7325124 | System and method of execution of register pointer instructions a... |
| 7308564 | Methods and circuits for realizing a performance monitor for a pr... |
| 7290121 | Method and data processor with reduced stalling due to operand de... |
| 7281117 | Processor executing SIMD instructions |
| 7234044 | Processor registers having state information |
| 7219218 | Vector technique for addressing helper instruction groups associa... |