| Patent No. | Patent Title: |
| 5940854 | Unique identifier for optical media |
| 5930815 | Moving sequential sectors within a block of information in a flas... |
| 5920887 | Disk drive with cache repeatedly accessed for a read command to p... |
| 5907859 | Storage device in which read/write operation is controlled in res... |
| 5900014 | External means of overriding and controlling cacheability attribu... |
| 5890212 | Disk drive with cache employing host pointer jumps during skip-ah... |
| 5890218 | System for allocating and accessing shared storage using program ... |
| 5870583 | Method of editing information for managing recordable segments of... |
| 5867685 | System and method for sequential detection in a cache management ... |
| 5860112 | Method and apparatus for blending bus writes and cache write-back... |
| 5845316 | Scheduling random I/O for data storage tape |
| 5845313 | Direct logical block addressing flash memory mass storage archite... |
| 5835936 | Single-chip flash-memory device using serial command, address, an... |
| 5829050 | Memory control device and memory data search circuit |
| 5829013 | Memory manager to allow non-volatile memory to be used to supplem... |
| 5829007 | Technique for implementing a swing buffer in a memory array |
| 5829017 | Removable medium data storage with pre-reading before issuance of... |
| 5822779 | Microprocessor-based data processing apparatus that commences a n... |
| 5822771 | System for management of software employing memory for processing... |
| 5822772 | Memory controller and method of memory access sequence recorderin... |
| 5819309 | Automated tape cartridge library with accelerated calibration |
| 5819310 | Method and apparatus for reading data from mirrored logical volum... |
| 5813023 | Method and apparatus for multiple latency synchronous dynamic ran... |
| 5809278 | Circuit for controlling access to a common memory based on priori... |
| 5809523 | System and method for determining relative cache performance in a... |
| 5806083 | Apparatus and method for an improved content addressable memory u... |
| 5806084 | Space saving method and floor plan for fabricating an integrated ... |
| 5802552 | System and method for allocating and sharingpage buffers for a fl... |
| 5802553 | File system configured to support variable density storage and da... |
| 5802568 | Simplified least-recently-used entry replacement in associative c... |
| 5802592 | System and method for protecting integrity of alterable ROM using... |
| 5802561 | Simultaneous, mirror write cache |
| 5802566 | Method and system for predicting addresses and prefetching data i... |
| 5802605 | Physical address size selection and page size selection in an add... |
| 5790828 | Disk meshing and flexible storage mapping with enhanced flexible ... |
| 5787463 | Disk array system including a dual-ported staging memory and conc... |
| 5787454 | Recorder buffer with interleaving mechanism for accessing a multi... |
| 5778435 | History-based prefetch cache including a time queue |
| 5778411 | Method for virtual to physical mapping in a mapped compressed vir... |
| 5778436 | Predictive caching system and method based on memory access which... |
Did You Know... 
PatentStorm News