| Patent No. | Patent Title: |
| 8191025 | Redundancy structures and methods in a programmable logic device |
| 8191018 | Methods and software for printing materials onto a substrate |
| 8191024 | Customizable H-tree synthesis tool |
| 8191033 | In situ clock jitter measurement |
| 8185853 | Transforming variable domains for linear circuit analysis |
| 8185854 | Method and apparatus for performing parallel slack computation wi... |
| 8181134 | Techniques for performing conditional sequential equivalence chec... |
| 8181140 | T-coil network design for improved bandwidth and electrostatic di... |
| 8176451 | Behavioral synthesis apparatus, behavioral synthesis method, and ... |
| 8176452 | Method and apparatus for circuit partitioning and trace assignmen... |
| 8171438 | Verification of a program partitioned according to the control fl... |
| 8171443 | Circuit design tools that support devices with real-time phase-lo... |
| 8171444 | Layout design method, apparatus and storage medium |
| 8171440 | Timing analyzing apparatus, timing analyzing method and program t... |
| 8166433 | Method to inspect floating connection and floating net of integra... |
| 8166431 | Reducing startup time of an embedded system that includes an inte... |
| 8166439 | Techniques for selecting spares to implement a design change in a... |
| 8166430 | Method for determining the quality of a quantity of properties, t... |
| 8161424 | Method and apparatus for modeling chemically amplified resists |
| 8161435 | Reset mechanism conversion |
| 8156456 | Unified design methodology for multi-die integrated circuits |
| 8151225 | Pattern layout designing method, semiconductor device manufacturi... |
| 8146027 | Creating interfaces for importation of modules into a circuit des... |
| 8141013 | Method and system of linking on-chip parasitic coupling capacitan... |
| 8141023 | Method and apparatus for preventing congestive placement |
| 8136074 | Printed circuit board design support program, recording medium, a... |
| 8136063 | Unfolding algorithm in multirate system folding |
| 8136071 | Three dimensional integrated circuits and methods of fabrication |
| 8132140 | Analyzing device for circuit device, circuit device analyzing met... |
| 8117585 | System and method for testing size of vias |
| 8108810 | Synchronous circuit synthesis using an asynchronous specification |
| 8108815 | Order independent method of performing statistical N-way maximum/... |
| 8108805 | Simplified micro-bridging and roughness analysis |
| 8108819 | Object placement in integrated circuit design |
| 8108816 | Device history based delay variation adjustment during static tim... |
| 8108817 | Semiconductor structure and method of designing semiconductor str... |
| 8103984 | System and method for compressed design phase contour data |
| 8091051 | Behavioral synthesis apparatus, method, and program having test b... |
| 8086975 | Power aware asynchronous circuits |
| 8082525 | Technique for correcting hotspots in mask patterns and write patt... |
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