| Patent No. | Patent Title: |
| 5585671 | Reliable low thermal resistance package for high power flip clip ... |
| 5567987 | Semiconductor device having a multi-layer metallization structure |
| 5543646 | Field effect transistor with a shaped gate electrode |
| 5510652 | Polishstop planarization structure |
| 5502324 | Composite wiring layer |
| 5491352 | Semiconductor device having peripheral metal wiring |
| 5479054 | Semiconductor device with improved planarization properties |
| 5477082 | Bi-planar multi-chip module |
| 5477087 | Bump electrode for connecting electronic components |
| 5475265 | Semiconductor device including gold interconnections where the go... |
| 5475240 | Contact structure of an interconnection layer for a semiconductor... |
| 5475236 | Semiconductor chip for mounting on a semiconductor package substr... |
| 5475260 | Electronic read-only module |
| 5475267 | Multilayer interconnection structure for a semiconductor device |
| 5473188 | Semiconductor device of the LOC structure type having a flexible ... |
| 5473193 | Package for parallel subelement semiconductor devices |
| 5471080 | Field effect transistor with a shaped gate electrode |
| 5471096 | Solder interconnection from a composition containing a mixture of... |
| 5471086 | Semiconductor device having piezo resistance |
| 5465007 | High frequency transistor with reduced parasitic inductance |
| 5465005 | Polysilicon resistor structure including polysilicon contacts |
| 5463242 | Thin film circuits with high density connector |
| 5463233 | Micromachined thermal switch |
| 5461394 | Dual band signal receiver |
| 5459353 | Semiconductor device including interlayer dielectric film layers ... |
| 5459335 | Semiconductor substrate having a thin film semiconductor layer bo... |
| 5459346 | Semiconductor substrate with electrical contact in groove |
| 5457343 | Carbon nanotubule enclosing a foreign material |
| 5455438 | Semiconductor integrated circuit device in which kink current ... |
| 5455455 | Methods for producing packaged integrated circuit devices and pac... |
| 5455452 | Semiconductor package having an LOC structure |
| 5455446 | Leaded semiconductor package having temperature controlled lead l... |
| 5455439 | Semiconductor device which moderates electric field concentration... |
| 5455445 | Multi-level semiconductor structures having environmentally isola... |
| 5453639 | Planarized semiconductor structure using subminimum features |
| 5453752 | Compact broadband microstrip antenna |
| 5451804 | VLSI device with global planarization |
| 5448102 | Trench isolation stress relief |
| 5448106 | Thin semiconductor integrated circuit device assembly |
| 5448255 | Dual band down converter for MMDS/MDS antenna |
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