Did You Know...
...that two musicians were responsible for the invention of color print film? Fascinated by photography, Leopold Godowsky and Leopold Mannes worked together to produce an easy-to-use, practical color film. They worked full time as music teachers and gave concerts while experimenting during their off hours in Mannes' kitchen. Their success earned them full-time, well-paying jobs at Kodak and their efforts resulted in Kodachrome film, which was introduced in 1935.
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| Number | Title | Issue Date |
| 6246347 | Controller for a variable length decoder A controller for controlling the operation of a variable length decoder, which includes a coding protocol determination circuit for determining a coding protocol used in coding a digital data stream currently being decoded by the variable length decoder, ... | 06/12/2001 |
| 6236346 | Cell array circuitry Cell array circuitry (20) includes a cell array (22) made up of a plurality of current-source cells (2) arranged in rows and columns. The cells of the array are assigned respective ordinal positions in a predetermined selection sequence conforming, for ex... | 05/22/2001 |
| 6215424 | System for variable length codeword processing suitable for video and other applications A variable length codeword decoder is responsive to a clock signal having multiple cycles and includes a source of sequential variable length codewords, each representing a run-length encoded codeword. A barrel shifter circuit is coupled to the codeword s... | 04/10/2001 |
| 6191720 | Efficient two-stage digital-to-analog converter using sample-and-hold circuits The present invention is a method and apparatus for converting a digital word into an analog quantity. A first plurality of signals is generated from a resistor network. A first signal is selected from the first plurality of signals based on a first half ... | 02/20/2001 |
| 6191713 | Conversion between serial bus cycles and parallel port commands using a state machine The present invention is directed to a method and apparatus for converting between serial bus cycles and parallel port commands. A serial bus processor processes a serial bus transaction which is represented by the serial bus cycles and is responsive to t... | 02/20/2001 |
| 6157334 | Digital-analog converter, circuit board, electronic device and liquid crystal display device A digital-analog converter, a circuit board, an electronic device, and a liquid crystal display device are provided that make it possible to decrease the number of required resistors and switches and to reduce power consumption. A digital-analog converter... | 12/05/2000 |
| 6140946 | Asynchronous serialization/deserialization system and method A parallel to serial conversion circuit is disclosed. The circuit is used for converting parallel bits representing a plurality of words into serial bits. The circuit consists of storing means which comprises a plurality of word locations for temporarily ... | 10/31/2000 |
| 6133861 | Selectable delay circuit having immunity to variations in fabrication and operating condition for write precompensation in a read/write channel Precompensated NRZ-encoded data for writing to magnetic storage medium operates with multiple NRZI-to-NRZ decoders that are each supplied with a selectably-variable version of a master clock. The delayed versions of the master clock are stably produced by... | 10/17/2000 |
| 6130635 | Method of converting an analog signal in an A/D converter utilizing RDAC precharging A method for operating a circuit in an analog to digital converter, including providing a resistor network (205) having a plurality of resistor banks (200) connected together, each resistor bank of the plurality of resistor banks having a plurality of res... | 10/10/2000 |
| 6127952 | Video data recording apparatus A video data run length decoding apparatus is disclosed. The aparatus includes a run length decoder for analyzing a run value of a coded video data, generating a run value, and alternately outputting an interval of a 8-clock signal in which there is a dat... | 10/03/2000 |
| 6124820 | Error correction architecture for pipeline analog to digital converters A pipeline analog to digital converter architecture includes at least two error correction stages, one such error correction stage at the end of the pipeline architecture such that power savings and silicon area optimization are achieved by tailoring the ... | 09/26/2000 |
| 6121908 | Monolithic filter gain control circuits and techniques with favorable noise behavior Circuits and techniques for controlling gain while performing analog frequency-selective filtering of electronic signals are provided. In particular, these circuits and techniques control gain and filter electronic signals in a way that significantly redu... | 09/19/2000 |
| 6121907 | Upward-folding successive-approximation optical analog-to-digital converter and method for performing conversion An optical analog-to-digital converter (10) which fully operates in the optical domain and utilizes an upward-folding successive approximation approach for conversion. The converter (10) includes a plurality of optical stages (14, 16, 18) where each stage... | 09/19/2000 |
| 6111528 | Communications arrangements for network digital data processing system Arrangements are disclosed for use in a network of digital data processing systems for rapidly encoding information signals for transmission over communication links in the network, and for rapidly decoding information received thereover, thereby to facil... | 08/29/2000 |
| 6104324 | Coding/decoding method for reproducing data in high density and reproducing data, and apparatus therefor A coding/decoding method for high density data recording/reproduction, and an encoder/decoder. In the coding method for encoding an 8-bit binary data symbol Xk (k=1, 2, 3, . . . , 8), received from a storage device or a communications channel, ... | 08/15/2000 |
| 6097319 | Quadrature encoding device with slope-triggered digitizing circuit A quadrature encoding device with slope-triggered digitizing circuit is provided for use in a mechanical mouse. The quadrature encoding device is capable of producing two square-wave signals indicative of the current mouse movement for position control of... | 08/01/2000 |
| 6097318 | Position measuring system and method for operating a position measuring system A position measuring system for the determination of the relative positions of two objects which can be moved with respect to each other, as well as a process for operating the same are disclosed, which in case of a relative movement provides at least one... | 08/01/2000 |
| 6094154 | Analog-to-digital converter An analog-to-digital converter includes a sample and hold circuit for sampling and holding an input analog signal and outputting an analog voltage, a selection code generator for generating a selection code corresponding to an operation mode for a number ... | 07/25/2000 |
| 6081216 | Low-power decimator for an oversampled analog-to-digital converter and method therefor An oversampled analog-to-digital converter (ADC) (20) includes a sigma-delta modulator (21) with two decimation filters to provide minimum power consumption. The first decimation filter (30) converts the output of the sigma-delta modulator (21) to a slowe... | 06/27/2000 |
| 6081213 | Method and apparatus for arithmetic coding, method and apparatus for arithmetic decoding, and storage medium The efficiency of arithmetic coding is improved. When both the maximum value and the minimum value of a base interval are included in a segment interval, no code is output because there is no need for identifying the base interval from other intervals. Wh... | 06/27/2000 |
| 6081212 | Decoder using a finite state machine in decoding an abstract syntax notation-message and an encoder for carrying out encoding operation at a high speed In a message decoder (1) including a message decoding section (102) which is supplied with an encoded message given by encoding, according to the Basic Encoding Rule, an objective message defined by an abstract syntax description described in accordance w... | 06/27/2000 |
| 6075477 | Voltage selector for a D/A converter A voltage selector for a D/A converter compensates for varying output response times for different value input signals due to variations in signal line lengths. The voltage selector includes a plurality of first stage transfer gates, including first and s... | 06/13/2000 |
| 6075471 | Adaptive coding method An adaptive coding method is comprised of: a fourth step (508), (510) for calculating an occurrence frequency of either the more probable symbol (MPS) or the less probable symbol (LPS) with respective to the entered input; a fifth step (511) for comparing... | 06/13/2000 |
| 6072415 | Multi-mode 8/9-bit DAC with variable input-precision and output range for VGA and NTSC outputs A digital-to-analog converter (DAC) is useful for driving both SVGA display monitors and NTSC TV monitors. The DAC converts 8-bit digital signals to analog voltage for SVGA, but converts 9-bit signals to a wider range of analog voltages for NTSC. Instead ... | 06/06/2000 |
| 6069575 | Variable length code decoder To provide a VLC decoder having a decoding speed sufficiently high to be applicable for decoding MPEG 2 data, and having an appropriate circuit size to be integrated on an IC chip, a VLC decoder comprises: a first decode table (102) implemented with logic... | 05/30/2000 |
| 6069579 | Folding type A/D converter and folding type A/D converter circuit An A/D converter simplifies its circuit configuration without deteriorating accuracy in A/D conversion. A circuit is formed of a folding and interpolation type. A gain-variable pre-amplifier group 11 amplifies each of reference voltages Vref1 to VrefN and... | 05/30/2000 |
| 6069578 | Method for automatic adjustment of sampling phase A method for automatic adjustment of sampling phase includes the steps of: (a) setting a predetermined number of test phase divisions for each of a plurality of sampling pulses from a sampling circuit; (b) controlling the sampling circuit to sample an ana... | 05/30/2000 |
| 6069574 | Hadamard code generation circuit A hadamard code generation circuit is disclosed. The circuit includes a start reset signal generator for generating a start reset signal START-- RESET when a 6-bit output signal REF-- C from the 6-bit reference counter, a higher 4-bi... | 05/30/2000 |
| 6067034 | Maximal bit packing method A method of mapping a substring of a bit stream to a symbol selected from a set of symbols, comprising: determining if the numeric value of an n bit substring of the bit stream is below a threshold; selecting the symbol from a first subset of symbols if t... | 05/23/2000 |
| 6064325 | Frequency modulation-based folding optical analog-to-digital converter A frequency modulation-based optical analog-to-digital converter utilizes a downward-folding, successive approximation approach. A series of stages is utilized to generate bits in the digital signal. In each stage, complementary low and high bandpass filt... | 05/16/2000 |
| 6064328 | Analog/digital converter with small crest factor dither signal superposed at an input side In an analog-digital converter, a sine signal angle-modulated with noise or pseudonoise is used as a dither signal. The dither signal is superposed on an analog useful signal that is to be digitized. This signal is then digitized. The dither signal is the... | 05/16/2000 |
| 6061008 | Sigma-delta-sigma modulator for high performance analog-to-digital and digital-to-analog conversion A sigma-delta-sigma modulator for analog-to-digital and digital-to-analog converters is described. The sigma-delta-sigma modulator is amenable to fabrication of high speed LSI and VLSI digital components for fixed and programmable processes for minimizing... | 05/09/2000 |
| 6061005 | Encoding of data The invention provides a method of encoding data, which includes defining a cell with a predetermined width and defining a plurality of internal signal positions within the cell, wherein the number of internal signal positions relates to the order of a sy... | 05/09/2000 |
| 6057794 | Sigma-delta modulation circuit A sigma-delta modulation circuit having the function of adjusting an amplitude by a small sized, simplified structure, wherein a parameter stored in a ROM controls an amplitude of a conversion signal in response to an amplitude parameter set by an amplitu... | 05/02/2000 |
| 6057789 | Re-synchronization of independently-clocked audio streams by dynamically switching among 3 ratios for sampling-rate-conversion A sample-rate converter has a FIFO for buffering input samples. The FIFO is written with an input sample by an input clock synchronized to the input audio stream. The samples are read from the FIFO by a derived clock. The derived clock is generated from a... | 05/02/2000 |
| 6052077 | Device for binary-coding a read signal from a magnetic tape A device for binary-coding a read signal from a magnetic tape is capable of reading correct digital data by setting an optimum threshold voltage of a comparator which digitalizes an analog read signal. The device includes a binary-coding section 10 which ... | 04/18/2000 |
| 6052076 | Digital-to-analog converter having high resolution and high bandwidth A digital-to-analog converter (DAC) is preferably employed to receive a digital input word and provide an analog output signal to a motor driver in a disk drive servo. The digital input word has a plurality of bit positions for establishing a resolution f... | 04/18/2000 |
| 6049299 | Dithering an analog signal to improve measurement A method of measurement. The method comprises the steps of (a) measuring a value, (b) forwarding the measured value as an analog signal, (c) dithering the analog signal to improve resolution and (d) converting the analog signal to a digital signal.... | 04/11/2000 |
| 6046692 | Microprocessor equipped with an A/D converter A microprocessor which can be used as a microprocessor with 8-bit A/D converter or 10-bit A/D converter is disclosed. Voltage comparator 2 compares the analog input signal AIN level with the reference voltage VREF, and then generates the comparative signa... | 04/04/2000 |
| 6046605 | Bidirectional asynchronous open collector buffer A bidirectional asynchronous open collector buffer. The buffer employs set delays and control logic to prevent latch up of the buffer when the low signal is applied to one of the ports of the buffer. Additionally, the buffer employs reset delays in conjun... | 04/04/2000 |
