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President Rutherford B. Hayes ; Said in 1876, after Alexander Graham Bell demonstrated the telephone to him at the White House
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| Number | Title | Issue Date |
| 6904666 | Method of manufacturing microwave filter components and microwave filter components formed thereby A simplified method for forming passive microwave components, such as a filter, and passive microwave components formed by the method. The method includes forming a ceramic insert having a plurality of resonator regions and then die casting an outer casing of a cond... | 06/14/2005 |
| 6225925 | Z-coder: a fast adaptive binary arithmetic coder A binary arithmetic coder and decoder provides improved coding accuracy due to improved probability estimation and adaptation. They also provide improved decoding speed through a "fast path" design wherein decoding of a most probable symbol requires few c... | 05/01/2001 |
| 6150964 | M=10 (2,10), D=3.75 runlength limited code for multi-level data A system for encoding digital data with an M-ary (d,k) code to provide multi-level coded data where M>2 comprises an M-ary (d,k) encoder for accepting digital input data. The M-ary (d,k) coder encodes the digital input data to produce a plurality of code ... | 11/21/2000 |
| 6147632 | Sampling frequency conversion apparatus and fractional frequency dividing apparatus for sampling frequency conversion The invention provides a sampling frequency conversion apparatus which converts a sampling frequency to another frequency using another oscillator employed in the system as the source oscillator. A fractional frequency divider divides an output of the sou... | 11/14/2000 |
| 6144326 | Digital isolation system with ADC offset calibration A digital capacitive isolation barrier system is provided that is suitable for use in a telephone or modem where the locally powered circuits must be effectively isolated from the public telephone system, while permitting data transfer across the barrier.... | 11/07/2000 |
| 6121912 | Subranging analog-to-digital converter and method An analog-to-digital converting including a resistor network for producing a group of coarse differential reference voltages and a group of fine differential reference voltages, a bank of coarse comparators receiving the coarse differential reference volt... | 09/19/2000 |
| 6118390 | Apparatus for obtaining a pulse width of an unknown pulse signal An apparatus is provided for processing a pulse signal. The apparatus includes (1) a pulse-shrinking circuit for shrinking a specific quantity of a pulse width of the pulse signal; and (2) a feedback circuit electrically connected to the pulse-shrinking c... | 09/12/2000 |
| 6107949 | Flash analog-to-digital converter with matrix-switched comparators An integrated circuit includes a converter for converting a signal from one form to another, one of the forms being analog and the other form being digital. The converter includes a voltage gradient having a plurality of MSB taps spaced there-along with t... | 08/22/2000 |
| 6104332 | Absolute value circuit and method An analog-to-digital converting including a resistor network for producing a group of coarse differential reference voltages and a group of fine differential reference voltages, a bank of coarse comparators receiving the coarse differential reference volt... | 08/15/2000 |
| 6104329 | Floating type analog-to-digital converter using delay units to achieve a wide dynamic range A floating type analog-to-digital converter which is capable of converting an analog signal into a digital signal in a wide dynamic range, while exhibiting stable frequency characteristics due to the presence of symmetric pre-echo and post-echo in the imp... | 08/15/2000 |
| 6100832 | A/D conversion apparatus having high level reception enhancement A plurality of amplifiers having different amplification factors are provided and a received signals and amplified output signal are all sampled by A/D converters. A selector selects, from the sampled signal, a signal from which accuracy can be attained e... | 08/08/2000 |
| 6100831 | Optoelectronic analog-to-digital converter using wavelength division multiplexing An optoelectronic system is provided for converting analog electrical sigs into digital electrical signals. An optical carrier produced by a laser source is separated into spectral components. An electro-optical modulator modulates the optical carrier wi... | 08/08/2000 |
| 6100829 | Method and apparatus for a digital peak detection system including a countdown timer A digital peak detection system digitizes analog signals and provides absolute values to a series of one cycle delays, and to a sequence of comparator stages. Each digital sample is parallel compared to a number of preceding samples equal to the number of... | 08/08/2000 |
| 6097320 | Encoder/decoder system with suppressed error propagation A magnetic recording system with a rate 16/17(0,6/8) encoder/decoder modulation code. This modulation code has a low k constraint for synchronization of a road clock of the magnetic recording system. Furthermore, this magnetic recording system has a low h... | 08/01/2000 |
| 6097325 | Synchronous sigma delta modulator including a decision circuit using a polyphase sampler The invention relates to a synchronous sigma-delta modulator with a feedback loop which comprises an integrating filter followed by a polyphase sampler generating a plurality of phase shifted samples and an adder to add the plurality of phase shifted samp... | 08/01/2000 |
| 6097323 | Serial/parallel converter using holding and latch flip-flops According to the present invention, a serial/parallel converter, which outputs, with the same phase and in parallel, a plurality of data sets input serially in synchronization with an input clock, comprises: at least two input latch flip-flops for latchin... | 08/01/2000 |
| 6094155 | Dual reference voltage buffer and method for updating CDAC bit capacitors A circuit for producing a stable CDAC reference voltage in a successive approximation analog-to-digital converter includes a circuit (27) producing an input reference voltage (VREFIN), and a buffer circuit (12) producing a stable reference voltage in resp... | 07/25/2000 |
| 6094151 | Apparatus and method for finite state machine coding of information selecting most probable state subintervals An FSM-coder hardware is described. In one embodiment, the present invention provides a method of encoding that includes creating an interval based on a finite state machine (FSM) state. The interval comprises a pair of subintervals having endpoints. The ... | 07/25/2000 |
| 6094153 | Analog-to-digital converter circuit Briefly, in accordance with one embodiment of the invention, a complementary metal-oxide semiconductor (CMOS) integrated circuit includes: a CMOS image sensor. The integrated circuit further includes an analog-to-digital (A/D) converter, at least one anal... | 07/25/2000 |
| 6094072 | Methods and apparatus for bipolar elimination in silicon-on-insulator (SOI) domino circuits In brief, methods and apparatus are provided for bipolar elimination in silicon-on-insulator (SOI) domino circuits. Apparatus for bipolar elimination in silcon-on-insulator (SOI) domino circuit includes a domino silicon-on-insulator (SOI) field effect tra... | 07/25/2000 |
| 6091259 | Apparatus for accelerating digital signal transitions using a transition acceleration circuit and a transition termination circuit A circuit for accelerating digital signal transitions includes an input/output node to receive a digital input signal. A transition termination circuit is connected to the input/output node to generate a transition termination signal when the digital inpu... | 07/18/2000 |
| 6087968 | Analog to digital converter comprising an asynchronous sigma delta modulator and decimating digital filter An analog to digital converter comprises an asynchronous sigma-delta modulator generating an asynchronous duty cycle modulated square wave, sampling means to synchronously sample the asynchronous square wave and a decimating digital filter to convert the ... | 07/11/2000 |
| 6087967 | Method for generating and reading a compressed all event trace file A method for creating a file of compressed data representing trace events produced in a circuit simulation. The method creates first and second arrays of value changes for a facility being monitored, and the time of the changes. The first and second array... | 07/11/2000 |
| 6084436 | Multi-input semiconductor logic device with mask pattern for reduced parasitic capacitance A multi-input semiconductor logic device capable of high-speed operation includes a first to fifth source/drain regions formed in an active area, and first to fourth gate electrodes formed over the active area through a gate insulating layer. The first to... | 07/04/2000 |
| 6084538 | Offset calibration of a flash ADC array A system and method is disclosed for calibrating comparators of an ADC. Individual comparators may be calibrated at random or psuedo-random times while the ADC is performing conversions without the addition of extra "proxy" or replacement comparators. Mor... | 07/04/2000 |
| 6081214 | A/D conversion device provided with a calibration arrangement An A/D conversion device includes: an amplifier AMP provided with regulating means controlled by a control signal OC or GC for adjusting the value of its output voltage V2, and an A/D converter ADC2 intended to convert the output voltage V2 of the amplifi... | 06/27/2000 |
| 6081218 | Five-level switched-capacitor DAC, method of operation thereof and sigma-delta converter employing the same A digital-to-analog converter (DAC) and a method of converting digital numbers to analog equivalents. In one embodiment, the DAC includes: (1) a data decoder that receives a digital number and an input clock signal and develops therefrom SIGN and M contro... | 06/27/2000 |
| 6078276 | Digital-to-analog conversion of LSB-first type using selective inversion based on gray code bits D/A-conversion of a Gray coded digital input signal is performed according to an inventive recursive Gray code-to-analog conversion algorithm. According to the recursive algorithm, the Gray code bits of the digital input are successively applied in the re... | 06/20/2000 |
| 6078196 | Data enabled logic circuits Data enabled complex logic gates provide improved speed/power performance over conventional topologies such as static logic or clocked domino logic. Within a data enabled complex logic gate, complementary parallel logic structures, such as NFET logic tree... | 06/20/2000 |
| 6075475 | Method for improved reproduction of digital signals The present invention provides a method for digital signal processing, referred to as sample-estimate-hold signal reconstruction, which provides a method of reconstructing output signals more representative of the original input analog signal than the con... | 06/13/2000 |
| 6075473 | Multibit digital to analog converter having deglitch means with current switching A D/A converter of a multibit type has improved performance by reducing dispersion of the electric currents of plural electric current sources as much as possible, in which the D/A converter has a constant electric current source (10) constructed by 2 | 06/13/2000 |
| 6075474 | Device for the generation of analog signals through digital-analog converters, especially for direct digital synthesis A device for the generation of analog signals by means of analog-digital converters comprises a block for the generation of words encoded on N bits and an analog-digital converter whose input is encoded on M bits, M being smaller than N. The device furthe... | 06/13/2000 |
| 6072413 | Current output type digital-to-analog converter capable of suppressing output current fluctuation using a current mirror In a digital-to-analog converter, a logic circuit includes a plurality of MOS transistors each having a gate connected to one of input signal lines, a drain connected to a first power supply terminal and a source which has one of a connection state where ... | 06/06/2000 |
| 6072410 | Coding/decoding method for high density data recording and reproduction A coding/decoding method for high density data recording and reproduction uses 16/17 RLL(0,6/6) coding/decoding, and by adopting an encoder/decoder having a more straightforward structure, the coding/encoding method can reduce the size of the hardware req... | 06/06/2000 |
| 6069494 | Method and apparatus for interfacing semiconductor devices for transfer therebetween having a serial bus for transmitting amplitude data from a master device to a slave device Semiconductor devices which are interfaced to transfer a data signal therebetween are connected to each other by a first bus which transmits the data signal at a rate at which the amplitude of the data signal needs to be adjusted. Each of the semiconducto... | 05/30/2000 |
| 6069577 | A/D conversion device provided with a gain calibration arrangement An A/D conversion device includes: an amplifier AMP receiving an input voltage V1 and supplying an output voltage V2, and an A/D converter ADC2 intended to convert the output voltage V2 of the amplifier AMP into a digital signal by comparing it with reference ... | 05/30/2000 |
| 6064326 | Analog-to-digital conversion overload detection and suppression A technique for detecting and suppressing overload conditions in an analog-to-digital converter which uses a delta-sigma modulator. In order to prevent overloading in modulator, a detection unit is used to detect a preset amplitude level associated with a... | 05/16/2000 |
| 6064324 | Digital signal encoding and decoding method and apparatus without transmitting information on quantization width Digital signal encoding and decoding method and apparatus are provided, by which the amount of codes for communicating the quantization width can be reduced to the utmost and the coding efficiency can be improved. In the method, at the time of encoding a ... | 05/16/2000 |
| 6061009 | Apparatus and method for resetting delta-sigma modulator state variables using feedback impedance A technique for resetting state variables of a delta-sigma modulator of an analog-to-digital converter. A switched capacitor impedance is placed in the reset feedback path of an integrator to ensure that the integrator tracks to the proper reset voltage, ... | 05/09/2000 |
| 6054944 | Data transmission method and device using 8-10 bit conversion and successive plus and minus running disparity synchronous data words In the case of transmitting upon converting the 8-bit word string data showing signal information to the 10-bit word string data consisting of word synchronous data, 8-bit word string data showing signal information is obtained and after inserting 2 each ... | 04/25/2000 |
