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| Number | Title | Issue Date |
| 5220189 | Micromechanical thermoelectric sensor element A thermoelectric sensor element that is adapted to respond to thermal radiation is capable of manufacture into a sensor array on a single crystal semiconductor means, such as silicon. An anisotropically etched pit is provided under the sensing surface, an... | 06/15/1993 |
| 5220188 | Integrated micromechanical sensor element A sensor element that is adapted to respond to radiation, and which is adapted to the manufacture of a sensor array is manufactured into a single crystal semiconductor means such as silicon. An anisotropically etched pit is provided under the sensing surf... | 06/15/1993 |
| 4990978 | Semiconductor device A semiconductor substrate is provided thereon with an insulated gate bipolar transistor which is a composite element of a pnpn thyristor and an N-channel MOS-FET. In order to monitor operating current of the insulated gate bipolar transistor, a monitor te... | 02/05/1991 |
| 4984058 | Semiconductor integrated circuit device In a semiconductor integrated circuit device having memory cell arrays, power source wirings are provided on the memory cell array in parallel with the long side of the memory cell array, thereby strengthening the power source wirings without increasing a... | 01/08/1991 |
| 4980749 | P-N junction semiconductor device and method of fabrication A gallium arsenide diode is disclosed which has a very thin resistive layer of a metal oxide, typically titanium oxide, formed annularly on a semiconductor substrate across the exposed annular periphery of a p-n junciton. The titanium oxide layer has a sh... | 12/25/1990 |
| 4980751 | Electrical multilayer contact for microelectronic structure An electrical contact between two film members that is stable over all conditions encountered in processing and over the device lifetime. The contact has a central multi-element diffusion barrier alloy layer having at least one elemental ingredient that d... | 12/25/1990 |
| 4980738 | Single polysilicon layer transistor with reduced emitter and base resistance A single layer polysilicon self-aligned transistor (52) is provided having a substantially vertical emitter contact region (62), such that the emitter contact region (62) does not require extending portions overlying the base region (60). Heavily doped si... | 12/25/1990 |
| 4980731 | Atomic planar-doped field-effect transistor An atomic planar-doped field-effect transistor is disclosed, which is featured by a channel region of a limited thickness between source and drain with at least one atomic planar-doped layer formed therein and a barrier layer or layers provided on the upp... | 12/25/1990 |
| 4979010 | VLSI self-aligned bipolar transistor A self-aligned bipolar transistor in which an emitter polysilicon layer is used to align both an extrinsic base region and a deep collector contact. The diffused extrinsic base is separated from the diffused emitter region by an oxide sidewall segment. Do... | 12/18/1990 |
| 4974045 | Bi-polar transistor structure A bi-polar transistor structure in a superhigh speed logic integrated circuit, and a process for producing the same are disclosed. The transistor has a substantially coaxial symmetric structure. Single crystal active layers as base and collector regions h... | 11/27/1990 |
| 4974041 | Integrated circuit structure with multiple common planes and method of forming the same An integrated circuit structure and method of forming the same is described in which a plurality of common signal planes are provided for an integrated circuit formed on a layer of semiconductive material (30). The common planes consist of a single crysta... | 11/27/1990 |
| 4974051 | MOS transistor with improved radiation hardness An MOS transistor is disclosed which has a guard ring for prevention of source-to-drain conduction through the isolation oxide after exposure to ionizing radiation. In the described example of an n-channel transistor, a p+ region is formed at the edges of... | 11/27/1990 |
| 4972239 | Conductivity modulated MOSFET A conductivity modulated MOSFET is composed of a p+ anode layer, a second n base layer formed on the anode layer for reducing the device's on resistance by conductivity modulation due to holes injected from the anode layer, an n type doped rec... | 11/20/1990 |
| 4969031 | Semiconductor devices and method for making the same A semiconductor device has an active layer in which a semiconductor element is formed by employing a silicon single crystal as a substrate. The present invention causes a tensile strain to remain in the active layer, thereby to improve the carrier mobilit... | 11/06/1990 |
| 4969030 | Integrated structure for a signal transfer network, in particular for a pilot circuit for MOS power transistors The integrated structure is formed of various circuital components accomplished by diffusion of dopants in a semiconductor substrate. Each component is located inside a respective insulation recess electrically floating in relation to the substrate and th... | 11/06/1990 |
| 4965643 | Schottky diode for integrated circuits An improved Schottky diode may be placed above an insulating layer such as the field oxide instead of within an epitaxial layer. The forward voltage, dynamic resistance and breakdown voltage may all be tailored.... | 10/23/1990 |
| 4965656 | Semiconductor device This invention provides a semiconductor device having an electrode conductor layer on a semiconductor substrate through the medium of a diffusion barrier layer, comprising the diffusion barrier layer formed of an amorphous material having a higher crystal... | 10/23/1990 |
| 4963975 | Semiconductor device A semiconductor device includes a semiconductor chip, a heat radiation plate having a mounting portion on which the semiconductor chip is mounted, lead terminals connected to the semiconductor chip, a mold resin for sealing the semiconductor chip and part... | 10/16/1990 |
| 4964143 | EPROM element employing self-aligning process A novel process is provided for fabricating contacts (46s, 40g, 46d) in a novel, completely self-aligned, planarized configuration for EPROM elements (66). The process of the invention permits higher packing densities, and allows feature distances to appr... | 10/16/1990 |
| 4962414 | Method for forming a contact VIA A method for forming a connection between two levels in a semiconductor structure includes first forming a VIA (14) through an insulating layer (12) to an underlying structure (10). Sidewall spacers (22) and (24) are formed on the vertical walls of the VI... | 10/09/1990 |
| 4959697 | Short channel junction field effect transistor A junction field effect transistor fabricated by a simplified process for incorporation into an integrated circuit including bipolar transistors is disclosed. The JFET comprises an isolated gate region of a first conductivity type with a surface on the in... | 09/25/1990 |
| 4956693 | Semiconductor device Disclosed is a semiconductor device having a support region, an element-forming region (e.g., an epitaxial layer) and a buried layer between the support region and the element-forming region, with at least one of a MOS element and a bipolar element being ... | 09/11/1990 |
| 4956689 | High speed gallium arsenide transistor and method Vertical buried emitter heterojunction bipolar transistors having greatly reduced emitter to base junction area and collector dimensions are fabricated in a gallium arsenide substrate to form an integrated circuit structure. The ability to scale these cri... | 09/11/1990 |
| 4956680 | Thin film transistor A thin film transistor having a shading layer for reducing optical leakage current. The shading layer is made essentially of opaque organic material.... | 09/11/1990 |
| 4952992 | Method and apparatus for improving the on-voltage characteristics of a semiconductor device A semiconductor device is disclosed which utilizes a Schottky-barrier diode to inject minority carriers into the device.... | 08/28/1990 |
| 4952994 | Input protection arrangement for VLSI integrated circuit devices An input protection arrangement for diverting current from high voltages due to, for example electrostatic discharges into a bonding pad of an integrated circuit chip. The chip has a bonding pad connected to a conducting path and to a source or drain regi... | 08/28/1990 |
| 4951107 | Kinetic energy modulated hot electron transistor A kinetic energy modulated hot electron transistor (KEMHET) wherein the input voltage does not change the amplitude of the input current, but modulates the kinetic energy of the input electron beam and the probability of electron transition beyond the out... | 08/21/1990 |
| 4949156 | Semiconductor string connection structure A semiconductor string connection structure comprising a plurality of encasements, each of which has a light emitting diode chip and a pair of conducting leads, a plurality of binding pieces connected between the encasements, a plurality of longitudinal p... | 08/14/1990 |
| 4949157 | Large scale integrated circuit This invention relates to an LSI in which a gate electrode wiring in a logic cell which is constructed by combining a plurality of basic cells each of which consisting of a pair of p-type and n-type MOS transistors and a gate electrode wiring, has portion... | 08/14/1990 |
| 4949146 | Structured semiconductor body A structured semiconductor body e.g., an integrated circuit or a transistor, based on an silicon substrate having barrier regions which contain polycrystalline silicon, preferably produced by a silicon MBE process. The barrier regions are required to deli... | 08/14/1990 |
| 4947234 | Semiconductor component with power MOSFET and control circuit A semiconductor component with a power MOSFET and control circuit for controlling the power MOSFET. Both the power MOSFET and the control circuit have separate semiconductor bodies. The semiconductor body of the control circuit is arranged on one of the m... | 08/07/1990 |
| 4945395 | Semiconductor device A semiconductor circuit comprises basic cells formed in an internal cell region on an integrated-circuit chip and pads for input/output cells, the pads being arranged in peripheral regions on said chip. The semiconductor circuit further comprises first lo... | 07/31/1990 |
| 4945394 | Bipolar junction transistor on silicon carbide The invention comprises a bipolar junction transistor formed in silicon carbide. By utilizing high temperature ion implantation of doping ions, the base and emitter can be formed as wells, resulting in a planar transistor. Mesa-type transistors are also d... | 07/31/1990 |
| 4942441 | Thin film semiconductor device and method of manufacturing the same Complementary thin fillm transistors (C-TFT) formed on an insulating substrate, comprising a pair of highly resistive n-type silicon islands, a pair of heavily doped n-type regions formed in one of the islands to form source and drain regions of n-channel... | 07/17/1990 |
| 4942449 | Fabrication method and structure for field isolation in field effect transistors on integrated circuit chips A method for forming a field oxide isolation region for a field effect transistor for use in integrated circuit chip devices includes process steps which preserve planarity while at the same time providing an increased degree of radiation hardness. The bi... | 07/17/1990 |
| 4942451 | Semiconductor device having improved antireflection coating A semiconductor device comprises a semiconductor substrate containing silicon as a constituent element, an impurity diffused layer formed in a predetermined region of the semiconductor substrate, an underlayer oxide film formed on the surface of the semic... | 07/17/1990 |
| 4937645 | Semiconductor device and a method of manufacturing the same A semiconductor device comprising n-channel MISFETs and p-channel MISFETs each having a gate electrode having side walls selectively provided with side wall insulating films, and a method of manufacturing such a semiconductor device. The side wall insulat... | 06/26/1990 |
| 4935800 | Semiconductor integrated circuit This invention discloses a semiconductor integrated circuit in which an analog circuit and a digital circuit are formed on a single chip. The semiconductor integrated circuit includes a p-type semiconductor region, an n+ -type buried region for... | 06/19/1990 |
| 4933732 | Heterojunction bipolar transistor A heterojunction bipolar transistor comprises a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type formed on the first semiconductor layer, a third semiconductor layer of a second conductivi... | 06/12/1990 |
| 4933733 | Slot collector transistor An improved semiconductor device is presented, the improvement comprising a slot collector contact region (38). The slot collector contact region (38) is formed in a semiconductor substrate (39) adjacent to base and emitter regions (40,44) of the bipolar ... | 06/12/1990 |