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Patent No. 6293874

User-operated amusement apparatus for kicking the user's buttocks

An apparatus including a user-operated and controlled apparatus for self-infliction of repetitive blows to the user's buttocks by a plurality of elongated arms bearing flexible extensions that rotate under the user's control.

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Examiner: Pham, Ly Duy


Primary examiner statistics: 88 patents; average approval time: 740 days
Assistant examiner statistics: 358 patents; average approval time: 705 days

Patents as Primary Examiner (view all)

Patent No. Patent Title:
7447110 Integrated circuit devices having dual data rate (DDR) output cir...
7417896 Flash memory device capable of reduced programming time
7391653 Twin insulator charge storage device operation and its fabricatio...
7391650 Method for operating non-volatile memory using temperature compen...
7385858 Semiconductor integrated circuit having low power consumption wit...
7385853 Data processing device
7385865 Memory circuit
7382662 Twin insulator charge storage device operation and its fabricatio...
7382650 Method and apparatus for sector erase operation in a flash memory...
7379366 Thin film magnetic memory device capable of conducting stable dat...
7379328 Semiconductor device
7379341 Loading data with error detection in a power on sequence of flash...
7376042 Boosted clock circuit for semiconductor memory
7372732 Pulse width converged method to control voltage threshold (Vt) di...
7369450 Nonvolatile memory having latching sense amplifier and method of ...
7366051 Word line driver circuitry and methods for using the same
7366044 Systems and methods for data transfers between memory cells
7366049 Apparatus and method for updating data in a dual port memory
7366024 Method and apparatus for operating a string of charge trapping me...
7362645 Integrated circuit fuses having corresponding storage circuitry
7359239 Non-volatile memory device having uniform programming speed
7359243 Memory cell repair using fuse programming method in a flash memor...
7359250 Twin insulator charge storage device operation and its fabricatio...
7359258 Semiconductor memory with wordline timing
7355893 Semiconductor memory device and method for writing to semiconduct...
7352621 Method for enhanced block management
7349274 Precharge circuit and method employing inactive weak precharging ...
7349273 Access circuit and method for allowing external test voltage to b...
7349270 Semiconductor memory with wordline timing
7349256 Flash memory devices and methods of programming the same by overl...
7345920 Method and apparatus for sensing in charge trapping non-volatile ...
7342831 System for operating non-volatile memory using temperature compen...
7336559 Delay-locked loop, integrated circuit having the same, and method...
7336517 Physical priority encoder
7330390 Noise resistant small signal sensing circuit for a memory device
7327618 Semiconductor memory with wordline timing
7327611 Method and apparatus for operating charge trapping nonvolatile me...
7327607 Method and apparatus for operating nonvolatile memory cells in a ...
7327599 Semiconductor memory device
7324392 ROM-based memory testing

Patents as Assistant Examiner (view all)

Patent No. Patent Title:
7414908 Magnetic memory device
7403417 Non-volatile semiconductor memory device and method for operating...
7372736 Monolithic, combo nonvolatile memory allowing byte, page and bloc...
7359266 Precharge circuit and method employing inactive weak precharging ...
7355881 Memory array with global bitline domino read/write scheme
7352628 Systems for programming differently sized margins and sensing wit...
7352632 Non-volatile semiconductor memory device
7349261 Method for increasing programming speed for non-volatile memory b...
7345916 Method and apparatus for high voltage operation for a high perfor...
7321521 Assessing energy requirements for a refreshed device
7310272 System for performing data pattern sensitivity compensation using...
7289363 Memory cell repair using fuse programming method in a flash memor...
7272039 Minimizing adjacent wordline disturb in a memory device
7272060 Method, system, and circuit for performing a memory related opera...
7262999 System and method for preventing read margin degradation for a me...
7260013 Power supply device in semiconductor memory
7257024 Minimizing adjacent wordline disturb in a memory device
7257020 Thin film magnetic memory device having redundant configuration
7254070 Semiconductor memory device with redundancy circuit
7254084 Data processing device
7251171 Semiconductor memory and system apparatus
7251157 Semiconductor device
7248514 Semiconductor memory device
7242629 High speed latch circuits using gated diodes
7242602 Semiconductor memory devices having conductive line in twisted ar...
7239554 Nonvolatile memory device and method of improving programming cha...
7236410 Memory cell driver circuits
7233522 NAND memory array incorporating capacitance boosting of channel r...
7227787 Method for erasing an NROM cell
7227774 MRAM integrated circuits, MRAM circuits, and systems for testing ...
7224616 Circuit and method for generating wordline voltage in nonvolatile...
7224624 Page buffer for nonvolatile semiconductor memory device and metho...
7218558 Semiconductor memory devices having column redundancy circuits th...
7218569 Memory circuit, and method for reading out data contained in the ...
7218542 Physical priority encoder
7215596 Circuit and method for controlling inversion of delay locked loop...
7212435 Minimizing adjacent wordline disturb in a memory device
7212444 Semiconductor nonvolatile memory device
7212437 Charge coupled EEPROM device and corresponding method of operatio...
7212430 Semiconductor memory
 
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