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| Number | Title | Issue Date |
| 5781772 | Compressed prefix matching database searching Aspects of the invention include a method of conducting a reduced length search along a search path. A node which would otherwise occur between a previous and a following node in the search path is eliminated, and information is stored as to whether, had ... | 07/14/1998 |
| 5659751 | Apparatus and method for dynamic linking of computer software components An apparatus and method for the dynamic (execution time) linking of object oriented software components is disclosed. The present invention comprises a computer system including a set of at least two software components. This invention provides a method a... | 08/19/1997 |
| 5655120 | Method for load balancing in a multi-processor system where arising jobs are processed by a plurality of processors under real-time conditions Method for load handling in a multiprocessor system, particularly a multiprocessor system of a communication system, whereby arising jobs can be processed by a plurality of processors under real-time conditions. When individual processors proceed into ove... | 08/05/1997 |
| 5655121 | Method and apparatus for encoding data to be self-describing by storing tag records describing said data terminated by a self-referential record A computer-implemented method and apparatus in a computer system of processing data generated by a first application program in a second application program during runtime. During runtime, the first application program generates a record including a plura... | 08/05/1997 |
| 5652879 | Dynamic value mechanism for computer storage container manager enabling access of objects by multiple application programs Computer apparatus stores a subject value and a chain of sequentially associated value handlers for the subject value. The chain includes a top value handler and a bottom value handler, each of the value handlers in the chain except the bottom value handl... | 07/29/1997 |
| 5634058 | Dynamically configurable kernel A dynamically configurable operating system is achieved by providing a module sub-system which intercepts requests by processes to access a module in the operating system and determines whether the module has been loaded in the kernel memory and linked th... | 05/27/1997 |
| 5631931 | Bus type clock supplying system for providing a clock in a communication system with a plurality of clock bus lines A bus type clock supplying system in a communication system with master-slave synchronization includes communication cards connected with transmission lines within a communication system and a clock bus. Each communication card includes a clock supplying ... | 05/20/1997 |
| 5632032 | Cross address space thread control in a multithreaded environment A method of controlling the execution of the threads of a first application such as a user application from a second application such as a debugger application running in a different address space. After initializing trace mode for the user application, t... | 05/20/1997 |
| 5630085 | Microprocessor with improved instruction cycle using time-compressed fetching A microcomputer includes an instruction decoder and a program counter. The instruction decoder decodes fetched instructions and outputs a control signal ordering execution of the fetched instruction. The control signal from the instruction decoder include... | 05/13/1997 |
| 5630133 | Customer information control system and method with API start and cancel transaction functions in a loosely coupled parallel processing environment The present invention is a distributed computer system having a plurality of end user terminals and a plurality of loosely coupled server computers that share no resources with each other. A multiplicity of user application processes are distributed over ... | 05/13/1997 |
| 5630123 | Software system utilizing a filtered priority queue and method of operation A software system (2) utilizing a filtered priority queue (10) is provided. A filtering module (4) is operable to access a plurality of data records of entities (16, 18, 20, 22, 24, 26 and 28) of a priority queue and to filter and arrange the data records... | 05/13/1997 |
| 5630130 | Multi-tasking low-power controller having multiple program counters A multitasking controller comprising task storage means (2) for storing up to N tasks (P0,P1,P2,P3) each comprising a sequence of instructions, a microprocessor for processing, by time-sharing, a plurality of such N tasks, and a random access memory (12) ... | 05/13/1997 |
| 5628019 | System and method for controlling a peripheral bus clock signal during a reduced power mode A system and method for controlling a peripheral bus clock signal through a slave device are provided that accommodate a power conservation scheme in which a peripheral bus clock signal may be stopped, for example, by a power management unit or other cent... | 05/06/1997 |
| 5619701 | Method and system for adapter configuration in a data processing system A method and system for sequence independent configuration of adapters installed in a data processing system. Adapters such as disk drive controllers, Token Ring adapters, terminal emulators and the like each include multiple choices associated therewith ... | 04/08/1997 |
| 5613115 | Method for using PLC programming information to generate secondary functions such as diagnostics and operator interface A programmable logic controller (PLC) in an operating system such as a machine includes a software development tool having labels in a first field to identify and describe specific input/output (I/O) points in the PLC. Each label assignment can be used in... | 03/18/1997 |
| 5606702 | Method for specifying user interfaces and programming system running a multiple user interface computer In a computer system, the ability to dynamically switch between different user interface types is provided. A directed graph is composed of nodes that each contain user interface information. A first part of the user interface information is common to eac... | 02/25/1997 |
| 5606695 | Method of scheduling successive tasks subject only to timing constraints A method of scheduling successive tasks subject only to timing constraints calculates for each task upper and lower limits of the interval in which execution of that task must start. It then constructs a first series in which all the tasks are scheduled i... | 02/25/1997 |
| 5604899 | Data relationships processor with unlimited expansion capability Machine automated techniques are described for a method of data processing called Relationships Processing. A computing system is disclosed which provides for the high speed recording and extraction of data objects (entities) and for the development data ... | 02/18/1997 |
| 5603018 | Program developing system allowing a specification definition to be represented by a plurality of different graphical, non-procedural representation formats A program developing system includes a plurality of graphic editors representing specification definition information a user inputs in representation formats different from each other and a mutual conversion unit for converting specification definition wh... | 02/11/1997 |
| 5590363 | Circuit for detection of co-processor unit presence and for correction of its absence A digital computer system includes a central processor unit (CPU) and an optional co-processor unit, both connected to a local bus. The co-processor unit, when installed, fits into a socket having pins, the pins being connected to communicate with the CPU... | 12/31/1996 |
| 5588030 | Apparatus and method for the synchronization of data in a bit stream In the system of the present invention, the system includes a pre-synchronizer to eliminate the need for examining every possible substring preceding the EOP (end of preamble) mark in order to detect the EOP. For the case where autocorrelation techniques ... | 12/24/1996 |
| 5572708 | Hardware simulator capable of dealing with a description of a functional level In a logic simulator for simulating a logic circuit described by sentences, each specifying at least one operation and at least two variables which should be subjected to the operation, a model memory memorizes operators for carrying out the operations fo... | 11/05/1996 |
| 5566336 | Operation macro generated method that changes execution control according to system situation A program generating method in which a program for performing again a series of user operations for an application program is generated as one which can be executed taking synchronization with a response message issued from a system program to the applica... | 10/15/1996 |
| 5557797 | Scheduling method for automatically developing hardware patterns for integrated circuits A scheduling method for scheduling a program comprises the steps of: extracting a plurality of traces from a given program such that each of the traces contains a plurality of program blocks executed sequentially, each of the plurality of program blocks c... | 09/17/1996 |
| 5555361 | Multiprocess input system with suppressed amount of communication between processes A multiprocess input system includes a first process execution part for processing input data, a second process execution part for processing the input data, and a third process execution part for distributing the input data to the first and second proces... | 09/10/1996 |
| 5553287 | Methods and apparatus for dynamically using floating master interlock A computer system, including at least one host (processor and operating system), a channel subsystem and at least one switch (together with an associated switch controller) for switchably connecting an I/O device (together with an associated I/O device co... | 09/03/1996 |
| 5535379 | Timer apparatus capable of writing identical data to a plurality of timers built in a microcomputer A timer apparatus which is provided with a control circuit 80, annexed to each of timers 1-1, 1-2 and 1-3 generating a control signal making the register 3 write data outputted from a CPU 50 when both a write signal 5 generated by the CPU 50 for writing d... | 07/09/1996 |
| 5530815 | Apparatus and method for verifying the order and operation of a data processing device when asynchronous commands are held in a command queue Asynchronous computation commands sent from a command control are held in a command queue. The executable command is selected and supplied to a pipelined asynchronous computing unit. A status area is assured for each command held in the command queue and ... | 06/25/1996 |
| 5526522 | Automatic program generating system using recursive conversion of a program specification into syntactic tree format and using design knowledge base This automatic program generation system is a system to generate a target program by recursive conversion of program, which uses a specification input means to input specification and convert it into syntactic tree format and utilizes a design control mea... | 06/11/1996 |
| 5522072 | Arrangement for efficiently transferring program execution between subprograms An arrangement called PASS CONTROL (FIG. 11) is used in combination with a conventional RETURN statement as a substitute for a conventional CALL-and-RETURN subprogram invocation sequence (FIG. 2), and effects a return from a whole series of subprogram inv... | 05/28/1996 |
| 5515535 | System and method for parallel variable optimization An optimizer for optimizing an intermediate representation (IR) tree having multiple nodes. The IR tree represents a partial compilation of a source code. The source code is written using a high level language supporting data parallel processing. Accordin... | 05/07/1996 |
| 5504894 | Workload manager for achieving transaction class response time goals in a multiprocessing system In a multiple processor transaction processing system, a class response time goal for each class of transactions is enforced by a workload manager, which computes a current average class response time for each transaction class and derives a current class... | 04/02/1996 |
| 5490276 | Programming language structures for use in a network for communicating, sensing and controlling information An improved programming interface which provides for event scheduling, improved variable declarations allowing for configuration of declaration parameters, and improved handling of I/O objects. In modern day computing devices and especially in networks of... | 02/06/1996 |
| 5488723 | Software system having replicated objects and using dynamic messaging, in particular for a monitoring/control installation of redundant architecture The invention relates to an object-oriented software system having replicated objects and which makes it possible to control a monitoring/control installation of redundant architecture and comprising at least one first processor (1) and one second process... | 01/30/1996 |
| 5485370 | Home services delivery system with intelligent terminal emulator Systems and methods provide communication between a user-friendly terminal, such as a "home terminal" shaped to resemble a conventional telephone, and a number of service provider computers such as financial institutions. The system's application software... | 01/16/1996 |
| 5485626 | Architectural enhancements for parallel computer systems utilizing encapsulation of queuing allowing small grain processing An architecture uses a process, termed "encapsulation", by which queues and counters are only accessed through a special memory operand called "object storage". The system alone is in control of the object storage, and the user cannot access it directly a... | 01/16/1996 |
| 5479654 | Apparatus and method for reconstructing a file from a difference signature and an original file Invention maintains duplicate files in safe places. A SCAN computer program creates a TOKEN Table of an earlier file. The TOKEN Table reflects the indices of successive segments of the file and the exclusive-or (XR) and Cyclic redundancy check (CRC) produ... | 12/26/1995 |
| 5467460 | M&A for minimizing data transfer to main memory from a writeback cache during a cache miss A cache memory having at least two modified bits for each block of data coupled to a WriteBack buffer circuit is described for transferring a fraction of the data block when a cache miss occurs. In the preferred embodiment of the present invention, the da... | 11/14/1995 |
| 5459867 | Kernels, description tables, and device drivers Description tables can be linked to a kernel to form a device driver. The description tables can be device description tables and adapter description tables. The kernel is operating system dependent. The description tables are operating system independent... | 10/17/1995 |
| 5455940 | Method for abnormal restart of a multiprocessor computer of a telecommunication switching system A master processor executes both switching-oriented and nonswitching-oriented functions and the other processors execute only switching-oriented functions. The processes to be executed are rendered independent of one another to such an extent that an inte... | 10/03/1995 |
