U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

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Examiner: Holtzman, Laura M.


Primary examiner statistics: 0 patents; average approval time: N/A
Assistant examiner statistics: 161 patents; average approval time: 596 days

Patents as Primary Examiner

Patent No. Patent Title:
No patents.

Patents as Assistant Examiner (view all)

Patent No. Patent Title:
5449435 Field emission device and method of making the same
5328553 Method for fabricating a semiconductor device having a planar sur...
5322816 Method for forming deep conductive feedthroughs
5320706 Removing slurry residue from semiconductor wafer planarization
5318663 Method for thinning SOI films having improved thickness uniformit...
5318665 Method for etching polysilicon film
5314573 Dry etching polysilicon using a bromine-containing gas
5312773 Method of forming multilayer interconnection structure
5308438 Endpoint detection apparatus and method for chemical/mechanical p...
5308415 Enhancing step coverage by creating a tapered profile through thr...
5304515 Method for forming a dielectric thin film or its pattern of high ...
5304510 Method of manufacturing a multilayered metallization structure in...
5302536 Method of manufacturing a semiconductor device, in which isolated...
5302233 Method for shaping features of a semiconductor structure using ch...
5300188 Process for making substantially smooth diamond
5298117 Etching of copper-containing devices
5296092 Planarization method for a semiconductor substrate
5290733 Method of manufacturing semiconductor devices including depositin...
5288661 Semiconductor device having bonding pad comprising buffer layer
5288666 Process for forming self-aligned titanium silicide by heating in ...
5286335 Processes for lift-off and deposition of thin film materials
5286678 Single step salicidation process
5286677 Method for etching improved contact openings to peripheral circui...
5282922 Hybrid circuit structures and methods of fabrication
5273935 Method of controlling etching with a focused charged beam by dete...
5272115 Method of leveling the laminated surface of a semiconductor subst...
5269880 Tapering sidewalls of via holes
5270254 Integrated circuit metallization with zero contact enclosure ...
5266523 Method of forming self-aligned contacts using the local oxidation...
5266525 Microelectronic interlayer dielectric structure and methods of ...
5264387 Method of forming uniformly thin, isolated silicon mesas on an ...
5262346 Nitride polish stop for forming SOI wafers
5260235 Method of making laser generated I. C. pattern for masking
5256248 Method for patterning semiconductor
5252517 Method of conductor isolation from a conductive contact plug
5246884 CVD diamond or diamond-like carbon for chemical-mechanical polish...
5244534 Two-step chemical mechanical polishing process for producing flus...
5244820 Semiconductor integrated circuit device, method for producing the...
5244819 Method to getter contamination in semiconductor devices
5242507 Impurity-induced seeding of polycrystalline semiconductors
 
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