Celebrity Inventors
Mark Twain (Samuel L. Clemens) received Patent No. 121,992 for "An Improvement in Adjustable and Detachable Straps for Garments." He later received two more patents: one for a self-pasting scrapbook and one for a game to help players remember important historical dates.
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| Number | Title | Issue Date |
| 7501330 | Methods of forming a high conductivity diamond film and structures formed thereby A method of forming a high thermal conductivity diamond film and its associated structures comprising selectively nucleating a region of a substrate, and forming a diamond film on the substrate such that the diamond film has large grains, which are at least about 20... | 03/10/2009 |
| 7462564 | Processing system and method for treating a substrate A processing system and method for chemical oxide removal (COR), wherein the processing system comprises a first treatment chamber and a second treatment chamber, wherein the first and second treatment chambers are coupled to one another. The first treatment chamber... | 12/09/2008 |
| 7456077 | Method for interconnecting anodes and cathodes in a flat capacitor A method includes connecting together one or more anode connection members of one or more anode foils and one or more cathode connection members of one or more cathode foils and electrically isolating the one or more anode foils from the one or more cathode foils. A... | 11/25/2008 |
| 7439174 | Multilayer hardmask scheme for damage-free dual damascene processing of SiCOH dielectrics Interconnect structures possessing an organosilicate glass based material for 90 nm and beyond BEOL technologies in which a multilayer hardmask using a line-first approach are described. The interconnect structure of the invention achieves respective improved device... | 10/21/2008 |
| 7435622 | High performance reworkable heatsink and packaging structure with solder release layer and method of making A method of making and a high performance reworkable heatsink and packaging structure with solder release layer are provided. A heatsink structure includes a heatsink base frame. A selected one of a heatpipe or a vapor chamber, and a plurality of parallel fins are s... | 10/14/2008 |
| 7436034 | Metal oxynitride as a pFET material A compound metal comprising MOxNy which is a p-type metal having a workfunction of about 4.75 to about 5.3, preferably about 5, eV that is thermally stable on a gate stack comprising a high k dielectric and an interfacial layer is provided as w... | 10/14/2008 |
| 7432166 | Methods of forming a nitrogen enriched region The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer. The nitrogen is subsequently thermally annealed wi... | 10/07/2008 |
| 7432115 | Test circuit, semiconductor product wafer having the test circuit, and method of monitoring manufacturing process using the test circuit A test circuit and a method of monitoring a manufacturing process of a semiconductor integrated circuit using the test circuit are provided. The test circuit comprises elements to be tested; a selection circuit for sequentially selecting at least one of the elements... | 10/07/2008 |
| 7432591 | Thermal enhanced plastic ball grid array with heat sink attachment option A thermal enhanced structure comprising a packaged electronic device and a heat sink that is removably attached thereto. The thermal enhanced structure includes a plastic ball grid array (PGBA) with an electronic chip, a plastic mold cover, and a heat spreader with ... | 10/07/2008 |
| 7429791 | Semiconductor device in a resin sealed package with a radiating plate and manufacturing method thereof The lower end of a resin wall is bonded to a radiating plate, and a lead is fixed so as to extend through the resin wall. After a semiconductor chip is bonded thereto, a resin lid is put to seal the semiconductor chip. Recessed parts for burying the lower end of the... | 09/30/2008 |
| 7427539 | Thin film transistor and method of manufacturing the same A method of manufacturing a thin film transistor includes: forming an amorphous silicon layer and a blocking layer; forming a photoresist layer having first and second photoresist patterns spaced apart from each other on the blocking layer; etching the blocking laye... | 09/23/2008 |
| 7422971 | Process for ultra-thin body SOI devices that incorporate EPI silicon tips and article made thereby The invention relates to a transistor that includes an ultra-thin body epitaxial layer that forms an embedded junction with a channel that has a length dictated by an undercut under the gate stack for the transistor. The invention also relates to a process of formin... | 09/09/2008 |
| 7423345 | Semiconductor constructions comprising a layer of metal over a substrate The invention includes a method of forming a metal-containing film over a surface of a semiconductor substrate. The surface is exposed to a supercritical fluid. The supercritical fluid has H2, at least one H2-activating catalyst, and at least o... | 09/09/2008 |
| 7420240 | Method to remove an oxide seam along gate stack edge, when nitride space formation begins with an oxide liner surrounding gate stack An exposed top end of a vertical oxide spacer is removed, and a nitride layer is deposited in an amount sufficient to replace the removed portion prior to exposing a memory device to a self align contact etch process. The nitride layer may be used to prevent a short... | 09/02/2008 |
| 7419919 | Method of manufacturing semiconductor device A method for manufacturing a semiconductor device, in which a substrate is disposed in a chamber and a fluorine-containing silicon oxide film is formed on the substrate using a plasma CVD process. The fluorine-containing silicon oxide film is formed such that the re... | 09/02/2008 |
| 7417253 | Semiconductor device and manufacturing method therefor An active layer of an NTFT includes a channel forming region, at least a first impurity region, at least a second impurity region and at least a third impurity region therein. Concentrations of an impurity in each of the first, second and third impurity regions incr... | 08/26/2008 |
| 7417255 | Methods of forming a high conductivity diamond film and structures formed thereby A method of forming a high thermal conductivity diamond film and its associated structures comprising selectively nucleating a region of a substrate, and forming a diamond film on the substrate such that the diamond film has large grains, which are at least about 20... | 08/26/2008 |
| 7416632 | Substrate processing apparatus and substrate processing method A substrate processing apparatus and a substrate processing method are provided wherein an oxide film which is thinner than the conventional films can be formed with uniform thickness when forming an oxide film on the front-side surface of a substrate. A subs... | 08/26/2008 |
| 7416954 | Enhanced on-chip decoupling capacitors and method of making same An apparatus including a capacitor formed between metallization layers on a circuit, the capacitor including a bottom electrode coupled to a metal layer and a top electrode coupled to a metal via wherein the capacitor has a corrugated sidewall profile. A method incl... | 08/26/2008 |
| 7416939 | Conductive spacers extended floating gates A method for manufacturing on a substrate (24) a semiconductor device with improved floating-gate to control-gate coupling ratio is described. The method comprises the steps of first forming an isolation zone (22) in the substrate (24), thereaft... | 08/26/2008 |
| 7413959 | Semiconductor device including a planarized surface and method thereof A method of planarizing the surface of a semiconductor substrate to reduce the occurrence of a dishing phenomenon. A patterned etch stop layer defining a trench region is formed on a substrate. The substrate is etched to form a trench region, and a medium material l... | 08/19/2008 |
| 7414721 | In-situ metrology system and method for monitoring metalization and other thin film formation An in-line, in-process or in-situ and non-destructive metrology system, apparatus and method provides composition, quality and/or thickness measurement of a thin film or multi-layer thin film formed on a substrate in a thin film processing system. Particularly, the ... | 08/19/2008 |
| 7413945 | Electrically isolated pillars in active devices A method of forming an active device is provided. The method includes performing a first patterning operation on a first plurality of layers. This first patterning operation defines a first feature of the active device. Then, a second patterning operation can be per... | 08/19/2008 |
| 7411214 | High performance FET devices and methods thereof Structure and methods of fabrication are disclosed for an enhanced FET devices in which dopant impurities are prevented from diffusing through the gate insulator. The structure comprises a Si:C, or SiGe:C, layer which is sandwiched between the gate insulator and a l... | 08/12/2008 |
| 7410861 | Methods of forming dynamic random access memory trench capacitors DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined. ... | 08/12/2008 |
| 7407866 | Soi wafer and a method for producing the same An SOI wafer in which a base wafer and a bond wafer respectively consisting of silicon single crystal are bonded via an oxide film, and then the bond wafer is thinned to form a silicon active layer, wherein the base wafer is formed of silicon single crystal grown by... | 08/05/2008 |
| 7408186 | Controlled alignment catalytically grown nanostructures Systems and methods are described for controlled alignment of catalyticaly grown nanostructures in a large-scale synthesis process. A composition includes an elongated nanostructure including a first segment defining a first axis and a second segment coupled to the ... | 08/05/2008 |
| 7408214 | Dynamic random access memory trench capacitors DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined. ... | 08/05/2008 |
| 7405147 | Device and methodology for reducing effective dielectric constant in semiconductor devices A method for manufacturing a structure includes providing a structure having an insulator layer with at least one interconnect and forming a sub lithographic template mask on the insulator layer. A selective etching step is used for etching the insulator layer throu... | 07/29/2008 |
| 7405134 | Method of manufacturing a semiconductor device and electronic equipment Exemplary embodiments of the present invention provide a method of manufacturing a semiconductor device that can take a connection between layers without giving damage to a layer, which is underlying. The semiconductor device includes forming conductive members Ms a... | 07/29/2008 |
| 7402524 | Post high voltage gate oxide pattern high-vacuum outgas surface treatment The present invention provides a method for fabricating a dual gate semiconductor device. In one aspect, the method comprises forming a nitridated, high voltage gate dielectric layer over a semiconductor substrate, patterning a photoresist over the nitridated, high ... | 07/22/2008 |
| 7402897 | Vertical system integration The Vertical System Integration (VSI) invention herein is a method for integration of disparate electronic, optical and MEMS technologies into a single integrated circuit die or component and wherein the individual device layers used in the VSI fabrication processes... | 07/22/2008 |
| 7399650 | Wavelength converted light emitting apparatus using phosphor and manufacturing method thereof Disclosed herein is a wavelength converted light emitting apparatus comprising a substrate, a light emitting diode, and a phosphor layer. The substrate is formed at its upper surface with first and second conductive patterns. At a partial region of the first conduct... | 07/15/2008 |
| 7399656 | Method of fabricating organic field effect transistors Organic field effect transistors (OFETs) can be created rapidly and at low cost on organic films by using a multilayer film (202) that has an electrically conducting layer (204, 206) on each side of a dielectric core. The electrically conducting layer ... | 07/15/2008 |
| 7400043 | Semiconductor constructions The invention includes a method of forming a metal-containing film over a surface of a semiconductor substrate. The surface is exposed to a supercritical fluid. The supercritical fluid has H2, at least one H2-activating catalyst, and at least o... | 07/15/2008 |
| 7396447 | Through-hole conductors for semiconductor substrates and system for making same A method, structure and system for forming a through-hole conductor in a semiconductor substrate includes forming a hole having an inner surface from a first side of the semiconductor substrate to a second side of the semiconductor substrate and plating the inner su... | 07/08/2008 |
| 7397831 | Laser annealing apparatus and annealing method of semiconductor thin film using the same A laser beam temporally modulated in amplitude by a modulator and shaped into a long and narrow shape by a beam shaper is rotated around the optical axis of an image rotator inserted between the beam shaper and a substrate. Thus, the longitudinal direction of the la... | 07/08/2008 |
| 7393705 | Methods of fabricating light emitting diodes that radiate white light A method for fabricating an LED that radiates white spectrum light. A phosphor that radiates a white spectrum after excitation in the blue or UV spectrum is uniformly deposited onto a GaN epitaxial wafer prior to die separation and packaging. This allows wafer-level... | 07/01/2008 |
| 7393792 | Light-emitting device and method of fabricating the same A light-emitting device having a structure in which a mask used for forming a film such as an organic compound layer does not come in contact with the pixels in forming the light-emitting elements, and a method of fabricating the same. In fabricating the light-emitt... | 07/01/2008 |
| 7394136 | High performance semiconductor devices fabricated with strain-induced processes and methods for making same A high performance semiconductor device and the method for making same is disclosed with an improved drive current. The semiconductor device has source and drain regions built on an active region, a length of the device being different than a width thereof. One or m... | 07/01/2008 |
