Dixon, Joseph L.

Primary examiner statistics: 617 patents; average approval time: 914 days
Assistant examiner statistics: 304 patents; average approval time: 822 days

Patents as Primary Examiner

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Number	Title	Issue Date
5923864	Virtual storage address space access control system including auxiliary translation lookaside buffer A virtual storage address space access control system has an access register having a plurality of access register numbers, a dynamic address translation unit and translation lookaside buffer for translating a virtual address to a real address by using a ...	07/13/1999
5490260	Solid-state RAM data storage for virtual memory computer using fixed-sized swap pages with selective compressed/uncompressed data store according to each data size A computer using virtual memory management employs a random-access type storage device such as a semiconductor memory for page swapping. The semiconductor memory is formatted to provide multiple partitions of varying block size, e.g., two block sizes, for...	02/06/1996
5437022	Storage controller having additional cache memory and a means for recovering from failure and reconfiguring a control unit thereof in response thereto A storage controller having additional cache memory and a system for recovering from failure and reconfiguring a control unit thereof in response thereto. The inventive controller includes a first cluster for directing data from a host computer to a stora...	07/25/1995
5430861	Computer using optically encoded virtual memory A method of and apparatus for extending the memory capacity of a computer system having a rotating optical memory storage device and a fixed memory storage includes a scanner for accessing computer information and a rotating optical read-write memory devi...	07/04/1995
5420997	Memory having concurrent read and writing from different addresses A random access memory (RAM) complex that can concurrently read and write to different addresses. The memory complex includes two RAMs, each having an address selector, includes a data out multiplexer for selecting outputs from one of the RAM's. A tag arr...	05/30/1995
5420998	Dual memory disk drive A dual disk drive peripheral data storage system is disclosed. The dual disk drive is a combination of a hard disk drive and a solid state disk drive whereby the solid state buffer memory that is typically used as a data cache for the hard disk drive is p...	05/30/1995
5416914	Management of removable media for multiple device types The removable media management system operates with a manual, an automated, or a combination of subsets of manual and automated library system to store and retrieve media cartridges for an associated plurality of drive elements. This system enables the us...	05/16/1995
5410662	Programmable control of EMS page register addresses A full set of 36 EMS registers is provided for a computer, without using any of the registers located in the 256K to 640K address range of the standard RAM. This is accomplished by providing first and second alternate RAM sets of 12 registers each, which ...	04/25/1995
5408635	Method of controlling data output by direct memory access An output control method includes the step of outputting a predetermined portion of data obtained by first direct memory access as last data of one line, checking whether the data obtained by the access includes data other than the last data, performing d...	04/18/1995
5408633	Data processing system and method for transfer and merging data in memory cards Computer-based application systems encounter a case in which data must not exist in a plurality of storage devices. This problem emerges typically in translocating data. The invention disclosed here is intended to erase data in its original location promp...	04/18/1995
5408628	Solid state recorder with flexible width data bus utilizing lock mapping and error correction and detection circuits A solid state data recorder employs a solid state memory to record data in the form of data words of variable length transmitted to the memory on a flexible width data bus. The memory is monitored to determine failed memory locations, and such locations a...	04/18/1995
5404485	Flash file system The provision of a flash memory, virtual mapping system that allows data to be continuously written to unwritten physical address locations. The virtual memory map relates flash memory physical location addresses in order to track the location of data in ...	04/04/1995
5404466	Apparatus and method to set and reset a pipeline instruction execution control unit for sequential execution of an instruction interval An execution control system for use in a pipeline instruction execution control type information processing device, wherein an instruction interval is executed sequentially after completion of a certain instruction used in, for example, a debugging proces...	04/04/1995
5404479	Electronic filing apparatus for filing and retrieving document data in a disk storage medium An electronic filing apparatus for filing and retrieving document data in a disk storage medium. The apparatus includes an image reading part for scanning a document with plural pages to successively generate image data from each of the pages of the docum...	04/04/1995
5404480	Information processor comprising a write buffer circuit containing an address buffer and a data buffer corresponding to each other The invention assures data consistency at a time of data update. Also, the invention results in a reduction in the access time required to store incoming data. In response to an equality signal from a comparator circuit of a write buffer circuit which is ...	04/04/1995
5404481	DMA controller comprising bus switching means for connecting data bus signals with other data bus signals without process or intervention A DMA controller, has bus switching means for connecting certain data bus signals with other data bus signals by itself during the DMA bus cycle. Therefore, even if the data bus signals in which a memory is connected are different from the data bus signal...	04/04/1995
5404487	Disc access control method for cache-embedded disc control apparatus with function-degradation capability of data transmission path A disc controller, which is connected to a plurality of channels for supplying access requests and discs. The controller includes a plurality of storage paths which control transfer of data between a cache, the channels and the discs, and a control memory...	04/04/1995
5404484	Cache system for reducing memory latency times The improved cache system reduces the effects of latency times by utilizing a preload instruction inserted by the compiler into the code. The preload instruction is sent sufficiently in advance of the corresponding load instruction to guarantee that the r...	04/04/1995
5398325	Methods and apparatus for improving cache consistency using a single copy of a cache tag memory in multiple processor computer systems Apparatus and methods for a cache controller to maintain cache consistency in a cache memory structure having a single copy of a cache tag memory while supporting multiple outstanding operations in a multiple processor computer system. The CPU includes a ...	03/14/1995
5396483	Recording medium having a track and electrode layer provided and recording and reproducing device and system using same A recording medium is prepared by irradiating an electron beam on a substrate following a certain pattern, then vapor depositing a metal onto the substrate to form a track comprising ultra-fine particles of the metal, further providing a metal layer on th...	03/07/1995
5394537	Adaptive page placement memory management system A virtual memory system groups pages into clusters according to use, determined by first reference and frequency of reference. The virtual memory system comprises a random access memory and an auxiliary memory. A central processing unit the virtual memory...	02/28/1995
5394532	Disk drive array memory system having instant format capability The disk drive array data storage subsystem maps between virtual and physical data storage devices and schedules the writing of data to these devices. The data storage subsystem functions as a conventional large form factor disk drive memory, using a plur...	02/28/1995
5394536	Stable memory circuit using dual ported VRAM with shift registers in a multiple memory bank setup for high speed data-transfer A stable memory circuit which includes a pair of memory banks (2(a)) and (2(b)) each having eight arrays of eight VRAMs (3). Each VRAM (3) is dual-ported and includes a processor port connected to a processor bus (6) and a stable memory port connected to ...	02/28/1995
5394538	Memory selection circuit for selecting one of various memory areas in a memory unit based on the capacity and the starting address of each area A memory selection circuit of a computer provided with a central processing unit and a plurality of memory areas of an equal capacity, including the first circuit for storing data corresponding to the capacity of the plurality of memory areas outputted fr...	02/28/1995
5394535	Memory access control circuit with automatic access mode determination circuitry with read-modify-write and write-per-bit operations A memory access control circuit determines an optimum memory access mode and performs the optimum memory access mode without requiring additional data from the data processing unit. The circuit performs a plurality of memory access operations, the number ...	02/28/1995
5392416	Method and apparatus for controlling one or more hierarchical memories using a virtual storage scheme and physical to virtual address translation A processing apparatus of an integrated circuit structure for a multiprocessor system includes an execution unit operative on the basis of a virtual storage scheme and a cache memory having entries designated by logical addresses from the execution unit. ...	02/21/1995
5392413	Record medium reproducing device In a CD-ROM disk reproducing device, for a data read instruction which specifies an address issued frequently from a host computer, irrespective of whether the device has a Lock Cache function, the time required from receipt of a data read instruction up ...	02/21/1995
5390313	Data storage system with data mirroring and reduced access time data retrieval A data storage system with data mirroring and reduced access time data retrieval includes at least one pair of rotating data storage media each having a plurality of generally identical data records. Each rotating data storage medium includes position ind...	02/14/1995
5390316	Multicomputer complex having a distributed shared memory system for providing a single system view from multiple consoles A computer complex is provided with a mechanism for message delivery and redelivery in a controlled manner through the use of distributed shared memory. This provides a mechanism for overall computer system complex operation from a plurality of consoles w...	02/14/1995
5390317	Technique to support progressively programmable nonvolatile memory A nonvolatile memory (28) in a data processor (10) is capable of being progressively programmed and/or accessed in a user determined number of sections. A user can program and/or access what appears to the user to be reprogrammable nonvolatile memory (28)...	02/14/1995
5390310	Memory management unit having cross-domain control A memory management unit (MMU) having cross-domain control for controlling a CPU's right to access a memory in order to initiate performance of an operation. The MMU includes a translator for translating a virtual address issued by the CPU into a physical...	02/14/1995
5390318	Managing the fetching and replacement of cache entries associated with a file system Information needed by application programs from a secondary storage is cached in a cache memory which is organized in multiple levels, each level having multiple entries, the entries of each level receiving information of a predetermined category, each en...	02/14/1995
5388246	Arrangement and method of controlling memory access requests in digital data processing system Before a memory access request is applied to a memory, a request receive signal is generated and applied to a controller. The controller retrieves information from a request information buffer having a limited memory space. The information is to be return...	02/07/1995
5386547	System and method for exclusive two-level caching A simple mixed first level cache memory system (50) includes a level 1 cache (52) connected to a processor (54)by read data and write data lines (56) and (58). The level 1 cache (52) is connected to level 2 cache (60) by swap tag lines (62) and (64), swap...	01/31/1995
5386524	System for accessing information in a data processing system A memory mapping system for use by a port adapter in a computer facilitates access to named data buffers in host memory. The system generally comprises a mechanism that enables the adapter to efficiently translate the data buffer name to physical address ...	01/31/1995
5386548	Method for storing data from an external processor in storage devices through buffer devices A data storage system having a local processor and a plurality of memory storage elements is used for storing data from one or more external CPUs. The storage system includes a plurality of memory buffers, each coupled to a separate memory storage element...	01/31/1995
5386541	Method of copying system data and copying adaptor therefor A method of copying system data at the time of updating of a main control apparatus in a system using a computer, and a copying adaptor used for this method. The method comprises replacing the control program memory of a main control apparatus, when it is...	01/31/1995
5386540	Method and apparatus for transferring data within a computer using a burst sequence which includes modified bytes and a minimum number of unmodified bytes A method of transferring data words that include data bytes within a computer having a main memory, a processor and a cache memory, with the processor being able to cause data words to be transferred in a burst mode from the cache memory to the main memor...	01/31/1995
5386533	Method and apparatus for maintaining variable data in a non-volatile electronic memory device An apparatus and method for maintaining variable data in a non-volatile electronic memory device comprises a shifter array (106) which provides a shifter value to shifter register (104). Shifter register (104) uses 8-bit column decoder (110) to specify wh...	01/31/1995
5386539	IC memory card comprising an EEPROM with data and address buffering for controlling the writing/reading of data to EEPROM An IC memory card connectable to a host has a storage implemented as an EEPROM, and a control circuit for controlling the storage to write data transferred from the host to the memory card in the storage. The control circuit has latches for temporarily ho...	01/31/1995

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Dixon, Joseph L.

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