Bizarre Patents
A forehead support apparatus for resting a standing users forehead against a wall above a bathroom commode or urinal or beneath a showerhead.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 6563863 | Computer modem A service chip for use with a computer. The chip includes a CPU interface, a transceiver interface, an adaptive echo cancellation filter, a monitor, and first and second data synthesizers. The CPU interface receives a transmit sample sequence from a modem... | 05/13/2003 |
| 6404810 | Activation method in data transceivers An activation method for adaptive equalization in a data transceiver including a plurality of adaptive filters wherein the adaptive filters are adapted with a first type of adaptation method to obtain initial convergence of the adaptive filters during an ... | 06/11/2002 |
| 6393073 | Method of frequency offset estimation and correction for adaptive antennas A method of frequency offset estimation and correction for adaptive antennas comprises receiving in a processor samples of a data set having a training data sample sequence. A batch least squares weight solution is computed for the training data sample se... | 05/21/2002 |
| 6393069 | Circuit and method for compensating for degradation in pulse width of burst data The output from a digital signal amplitude regenerator circuit in which the amplitude of a transmitted burst data signal is amplified, and an initial potential generator circuit, are connected to a switch. While there are no burst data, the initial potent... | 05/21/2002 |
| 6381286 | Cartesian loop transmitter A Cartesian loop transmitter for transmitting baseband signals is disclosed. The disclosed Cartesian loop includes a forward path having a first input for receiving the baseband signals and a second input and a feedback path having an input from the forwa... | 04/30/2002 |
| 6370190 | Data receiver including hybrid decision feedback equalizer A decision feedback encoder comprising an analog-to-digital converter for converting an input signal into digital signals representing decision levels, digital processing circuits responsive to signals from the converter for providing a succession of symb... | 04/09/2002 |
| 6356607 | Preamble code structure and detection method and apparatus In a first embodiment of the invention, a concatenated preamble code is formed by a kronecker product between two subcodes of the same or different lengths. The subcodes have favorable correlation properties and may be Barker codes, minimum peak sidelobe ... | 03/12/2002 |
| 6314146 | Peak to average power ratio reduction The present inventions provide methods and systems for reducing the peak to average power ratio of a multi-carrier signal. Reducing the peak to average power ratio of a signal ensures that amplifiers and transmitters are not saturated, causing loss of dat... | 11/06/2001 |
| 6314135 | Method and apparatus for updating precoder coefficients in a data communication transmitter In a data communication system having a channel with time-varying impairments and further having a transmitter with a precoder, a method and apparatus for updating the precoder coefficients. The method and apparatus is based on the arrangement of a duplic... | 11/06/2001 |
| 6307905 | Switching noise reduction in a multi-clock domain transceiver A method for reducing system performance degradation caused by switching noise in a system which includes a set of subsystems. Each of the subsystems includes an analog section and a digital section. Each of the analog sections operates in accordance with... | 10/23/2001 |
| 6307907 | Complex multiplier Complex multiplication is performed using a multiplier by generating time division signals with a first clock and a second clock having a speed twice as fast as the first clock and operating the multiplier in a time division mode by the time division sign... | 10/23/2001 |
| 6307902 | Gain imbalance compensation method and apparatus for a quadrature receiver A cordless telephone system connectable to the public switched telephone network having a base station and one or more handsets communicating with the base station by an RF link using a time division duplex direct sequence spread spectrum quadrature modul... | 10/23/2001 |
| 6304870 | Method and apparatus of automatically generating a procedure for extracting information from textual information sources A procedure is disclosed for automatically constructing wrappers for performing information-extraction from sites such as Internet resources that display relevant information, interspersed with extraneous text fragments, such as HTML formatting commands o... | 10/16/2001 |
| 6304615 | Serial digital data communications receiver with improved automatic cable equalizer, AGC system, and DC restorer A serial digital data communications receiver with an improved automatic cable equalizer that is less susceptible to jitter and has greater multi-standards capability, and an improved automatic gain control system with a DC restorer that provides optimal ... | 10/16/2001 |
| 6301309 | Signal gating controller for enhancing convergency of MLT3 data receivers A signal gating controller for recovering true data signal pulses while gating out false data signal pulses which are generated and prevent convergence when recovering a multilevel data signal, such as an MLT3 Ethernet signal, which has been severely over... | 10/09/2001 |
| 6301318 | Pipelined phase detector for clock recovery A method of phase detecting a data input NRZ signal comprises applying the input data signal to a pair of parallel channels each comprising the same phase delay, and each clocked using the same clock signal. The phase delayed input data signal is coupled ... | 10/09/2001 |
| 6298105 | Method and apparatus for a low skew, low standby power clock network An apparatus for a low skew, low standby power clock network for a synchronous digital system. The power clock network comprises a reference network, maintaining a reference clock signal, and four clock spines, each with its own respective clock signal. T... | 10/02/2001 |
| 6295328 | Frequency multiplier using delayed lock loop (DLL) A frequency multiplier is provided that increases operational stability by using a Delay Locked Loop (DLL). The frequency multiplier includes a phase detector for detecting a phase difference between an input signal and a feed-back signal, a loop filter f... | 09/25/2001 |
| 6292798 | Method and system for controlling access to data resources and protecting computing system resources from unauthorized access The invention controls access to data resources by performing the steps of: providing (i) a first directory which relates data objects to object groups, each object group including all data objects having a common assigned security attribute; (ii) a secon... | 09/18/2001 |
| 6289055 | Method for transmitting digital signals A signal when transmitting digital transmission signals between a transmitter unit and at least one receiver unit, one signal lead is generally required as a transmission medium for each digital transmission signal. To permit simultaneous transmission of ... | 09/11/2001 |
| 6289070 | Digital isolation system with ADC offset calibration including coarse offset A digital capacitive isolation barrier system is provided that is suitable for use in a telephone or modem where the locally powered circuits must be effectively isolated from the public telephone system, while permitting data transfer across the barrier.... | 09/11/2001 |
| 6285722 | Method and apparatus for variable bit rate clock recovery Methods and apparatuses consistent with the present invention recover a clock signal from a variable bit rate data signal by estimating, in the time domain, the bit rate of the data signal, and based on the estimated variable bit rate, determining a cente... | 09/04/2001 |
| 6282229 | Method and apparatus for receiving spread spectrum signal To synchronize spread spectrum (SS) signal with PN sequence, even when a Doppler frequency of fading is low. Delay profile combining means outputs a combined delay profile from delay profiles which are outputted from receiving units. Further, the synch ch... | 08/28/2001 |
| 6278753 | Method and apparatus of creating and implementing wavelet filters in a digital system A method for generating a wavelet filter provides improved selectivity with minimal computational intensity in digital data systems (300,400). The process begins by generating an initial wavelet formed of low pass and high pass analysis filter bank (302).... | 08/21/2001 |
| 6278742 | Method and system for power-conserving interference avoidance in communication between a mobile unit and a base unit in a wireless telecommunication system A method for avoiding interference in a wireless telecommunication system is provided. The method includes providing communication between a first and second component at an initial frequency. A plurality of successive line quality indicators is determine... | 08/21/2001 |
| 6278990 | Sort system for text retrieval The present invention is a method for operating a computer system to retrieve information from a computer database. This method decomposes documents from the database into subdocuments and then inverts the database. Also, a query for retrieving documents ... | 08/21/2001 |
| 6278747 | Method and apparatus for performing digital detection of data stored on an optical medium A method and apparatus for detecting data written on a recording medium are disclosed. The recording medium, such as an optical or magnetic medium, is initially sensed by a transducer to produce an analog data signal waveform. The analog data signal wavef... | 08/21/2001 |
| 6275522 | Method for allocating data and power in a discrete, multi-tone communication system In the present invention, an ADSL system (10) identifies good bin as a bin capable of successfully transmitting data to a destination. A bad bin is identified as a carrier that is not capable of successfully transmitting data to the destination. A margina... | 08/14/2001 |
| 6275538 | Technique for finding a starting state for a convolutional feedback encoder A convolutional feedback encoder uses a shift type shift register with both feed-forward and feedback circuit structures to process and encode a fixed length information sequence. The encoder is configured, through careful selection of the feedback coeffi... | 08/14/2001 |
| 6272187 | Device and method for efficient decoding with time reversed data A novel device which efficiently decodes data encoded with a cyclic code in communications systems where a convolutional code is applied after the cyclic code during encoding. Specifically, the device accepts data provided in time reversed order by a Vite... | 08/07/2001 |
| 6272174 | Multiple frequency bin processing A method for increasing signal acquisition in global positioning system receivers is described. An algorithm for a banked filter of the invention provides low attenuation between frequency bins in which all of the frequency bins produce useful results and... | 08/07/2001 |
| 6272491 | Method and system for mastering locks in a multiple server database system A method and apparatus are provided for managing resources in a system that has multiple nodes. Each resource of a plurality of resources is assigned to a lock club of a plurality of lock clubs. A master node is assigned to each lock club of the plurality... | 08/07/2001 |
| 6272196 | Encoder using an excitation sequence and a residual excitation sequence In a CELP coder, a comparison between a target signal and a plurality of synthetic signals is made. A synthetic signal is derived by filtering a plurality of excitation sequences by a synthesis filter having parameters derived from the target signal. The ... | 08/07/2001 |
| 6272195 | Method and apparatus for correcting signal skew differentials between two interconnected devices A device and method for eliminating system clock skew in portable computer (15) units used with an expansion base (20) including an oscillator (175), resistors (225, 230) and capacitor (235) tuned to a predetermined propagation delay time to align the por... | 08/07/2001 |
| 6269135 | Digital phase discriminations based on frequency sampling The present invention, generally speaking, provides a simple, all-digital method and apparatus for determining the phase of a first clock signal relative to a second clock signal. The first clock signal may be a digital approximation of a periodic analog ... | 07/31/2001 |
| 6269115 | Linear-phase filter implementation using orthonormal laguerre expansions A forward impulse response, linear-phase matched filter, receiving as an input a sampled digital representation of an input signal, x(n), having n samples, and providing a filtered output, ya (n), having K stages, stage 0, stage 1, . . . stage ... | 07/31/2001 |
| 6269363 | Method of accessing data using approximate data structures by relaxing the operations that define same A method for constructing approximate data structures is disclosed in which the operations that define the data structure are relaxed. The operations are specified such that error of approximation in the results of the operations may be traded for speed i... | 07/31/2001 |
| 6269130 | Cached chainback RAM for serial viterbi decoder A serial Viterbi decoder having a chainback cache is provided for use in a mobile telephone. In one embodiment described herein, the decoder includes a branch error metric block, an add-compare-select unit, and a chainback block including a chainback RAM,... | 07/31/2001 |
| 6269116 | Method and arrangement for demodulating data symbols The present invention relates to a method and an arrangement for demodulating data symbols (d1 -dN) having been transmitted through a communication channel, particularly a channel suffering from one or more impairments. Received sign... | 07/31/2001 |
| 6266361 | Method and architecture for correcting carrier frequency offset and spreading code timing offset in a direct sequence spread spectrum communication system A method and an architecture for correcting carrier frequency offset and spreading code timing offset in a direct sequence spread spectrum communication system are disclosed. In the present invention, the carrier frequency offset is divided into an intege... | 07/24/2001 |
