U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

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Examiner: Anya, Igwe U.


Primary examiner statistics: 0 patents; average approval time: N/A
Assistant examiner statistics: 521 patents; average approval time: 522 days

Patents as Primary Examiner

Patent No. Patent Title:
No patents.

Patents as Assistant Examiner (view all)

Patent No. Patent Title:
7598576 Environmentally robust passivation structures for high-voltage si...
7579196 Interconnect connecting a diffusion metal layer and a power plane...
7579642 Gate-enhanced junction varactor
7575952 Manufacturing method of semiconductor device having organic semic...
7576014 Semiconductor device and manufacturing method thereof
7569400 Ferroelectric film, method of manufacturing ferroelectric film, f...
7569483 Methods of forming metal silicide layers by annealing metal layer...
7550398 Semiconductor device and method of fabricating the same
7550850 Semiconductor device
7547558 Method for manufacturing semiconductor device
7547598 Method for fabricating capacitor in semiconductor device
7538029 Method of room temperature growth of SiOon silicide as an etch st...
7538035 Lapping of gold pads in a liquid medium for work hardening the su...
7527987 Fast localization of electrical failures on an integrated circuit...
7525122 Passivation of wide band-gap based semiconductor devices with hyd...
7507640 Method for producing silicon wafer
7494904 Plasma-assisted doping
7495280 MOS devices with corner spacers
7491588 Method and structure for buried circuits and devices
7488682 High-density 3-dimensional resistors
7488643 MIM capacitor and method of making same
7482691 Semiconductor device and method for fabricating the same
7476625 Method for fabricating semiconductor device
7470609 Semiconductor device and method for manufacturing the same
7470632 Method of depositing a silicon dioxide comprising layer doped wit...
7470630 Approach to reduce parasitic capacitance from dummy fill
7465675 Method of forming a phase change memory device having a small are...
7462560 Process of physical vapor depositing mirror layer with improved r...
7459367 Method of forming a vertical P-N junction device
7459361 Semiconductor device with ferroelectric capacitor and fabrication...
7452770 Reduced cell-to-cell shorting for memory arrays
7442649 Etch with photoresist mask
7442979 Reduced cell-to-cell shorting for memory arrays
7427328 Large-area nanoenabled macroelectronic substrates and uses theref...
7425490 Reducing reactions between polysilicon gate electrodes and high d...
7419907 Eliminating metal-rich silicides using an amorphous Ni alloy sili...
7416988 Semiconductor device and fabrication process thereof
7413912 Microsensor with ferroelectric material and method for fabricatin...
7413913 Semiconductor device and method of manufacturing the same
7410873 Method of manufacturing a semiconductor device
 
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