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| 8190861 | Micro-sequence based security model |
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| 8185722 | Processor instruction set for controlling threads to respond to e... |
| 8185719 | Message routing scheme for an array having a switch with address ... |
| 8180997 | Dynamically composing processor cores to form logical processors |
| 8176481 | Methods and apparatus for distributing software applications |
| 8176296 | Programmable microcontroller architecture |
| 8171270 | Asynchronous control transfer |
| 8171121 | Method, system, and apparatus for dynamic reconfiguration of reso... |
| 8166282 | Multi-version register file for multithreading processors with li... |
| 8166281 | Implementing instruction set architectures with non-contiguous re... |
| 8146091 | Expansion and contraction of logical partitions on virtualized ha... |
| 8145880 | Matrix processor data switch routing systems and methods |
| 8141095 | Recording medium storing data allocation control program, data al... |
| 8140827 | System and method for efficient data transmission in a multi-proc... |
| 8132168 | Systems and methods for optimizing a process of determining a loc... |
| 8131975 | Matrix processor initialization systems and methods |
| 8127111 | Managing data provided to switches in a parallel processing envir... |
| 8127113 | Generating hardware accelerators and processor offloads |
| 8122228 | Broadcasting collective operation contributions throughout a para... |
| 8117613 | Optimized virtual machine migration mechanism |
| 8112754 | Controlling body-bias voltage and clock frequency in a multiproce... |
| 8103854 | Methods and apparatus for independent processor node operations i... |
| 8103858 | Efficient parallel floating point exception handling in a process... |
| 8099585 | Predicated execution using operand predicates |
| 8095935 | Adapting message delivery assignments with hashing and mapping te... |
| 8082430 | Representing a plurality of instructions with a fewer number of m... |
| 8060725 | Processor architecture with processing clusters providing vector ... |
| 8056086 | Load balancing for image processing using multiple processors |
| 8055885 | Data processing device for implementing instruction reuse, and di... |
| 8041926 | Transparent concurrent atomic execution |
| 8037287 | Error recovery following speculative execution with an instructio... |
| 8028152 | Hierarchical multi-threading processor for executing virtual thre... |
| 8020167 | System and method for automatic throttling of resources in an inf... |
| 7996659 | Microprocessor instruction that allows system routine calls and r... |
| 7996654 | System and method for optimization within a group priority issue ... |
| 7991979 | Issuing load-dependent instructions in an issue queue in a proces... |
| 7991985 | System and method for implementing and utilizing a zero overhead ... |
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