Did You Know...
...that Robert Adler has the dubious distinction of being the Father of the Couch Potato? Back in 1955 Adler was employed by what was then Zenith Radio Corp., where he was charged to invent something that would allow viewers to turn down the TV volume without leaving their chairs. After a series of flops (such as a wired contraption that people tripped over), Adler hit on the idea of using sound waves. Thus the Remote Control was born...
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| Number | Title | Issue Date |
| 8190970 | Probe-based data storage devices A probe-based data storage device includes a storage surface having an array of A storage fields; a probe array comprising A probes for writing data to respective storage fields; and an apparatus for controlling writing of blocks of user data in the array of storage... | 05/29/2012 |
| 8190959 | Wireless communication system, terminal and base station A non-terminated packet is transmitted, by utilizing a spatial layer responded with an ACK, which is assumed as a released layer. Alternatively, a non-terminated packet is transmitted by using a released layer and an original spatial layer in combination. Alternativ... | 05/29/2012 |
| 8190972 | Error checking and correction overlap ranges A method to write data with error checking and correction overlap ranges is disclosed. The method generally includes the steps of (A) receiving plurality of input numbers in a plurality of input signals, (B) generating a plurality of error correction codes by separa... | 05/29/2012 |
| 8190976 | High-speed interface for holographic storage read channel Embodiments of the present invention provide a read channel including a front end to receive an optical image, convert the optical image into multi-bit soft information, and to serially transmit the multi-bit soft information to other components of the read channel.... | 05/29/2012 |
| 8185803 | Apparatus for providing error correction capability to longitudinal position data A method and apparatus for providing error correction capability to longitudinal position data are disclosed. Initially, data are encoded via a set of even LPOS words and a set of odd LPOS words. The encoded data are then decoded by generating a set of syndrome bits... | 05/22/2012 |
| 8185792 | Data-transmission device data-reception device and data-transmission-and-reception system A data-transmission device dividing video data into packets and transmitting the packet to a data-reception device requesting the video data includes a unit generating transmission packets based on the video data, a unit setting importance for each of the generated ... | 05/22/2012 |
| 8181082 | Wireless receiver system and method with automatic gain control A wireless receiver system with automatic gain control, which includes a receiving path, an analog to digital converter, an automatic gain control (AGC) device and a controller. The controller has an adjacent channel interference off mode, an adjacent channel interf... | 05/15/2012 |
| 8181099 | Transmission device Disclosed is a transmission device in a communication system in which a systematic code obtained by systematic encoding of information bits into which dummy bits are inserted and by deleting the dummy bits from the results of the systematic encoding is transmitted a... | 05/15/2012 |
| 8176386 | Systems and methods for processing streaming data A disk drive system-on-chip (SOC) includes a read-channel module and a processor. The read-channel module reads data, includes a first error-correcting module for correcting errors in the data, corrects errors in a first portion of the data using the first error-cor... | 05/08/2012 |
| 8176405 | Data integrity validation in a computing environment A method for validating data in a data storage system comprising associating a first data chunk with first check data and storing the first data chunk and the first check data on a first storage device. Additional associated data chunks of the first data and associa... | 05/08/2012 |
| 8161358 | Parity bit soft estimation method and apparatus The systematic and parity bits of a symbol are tightly coupled to each other based on the way in which the symbol is encoded. The relationship between the systematic and parity bits can be exploited to improve the accuracy of soft bit estimation for both the systema... | 04/17/2012 |
| 8145968 | Method of determining binary signal of memory cell and apparatus thereof A method and apparatus to determine a binary signal of a memory cell capable of decreasing an error rate of binary signal determination that occur due to neighboring cells and noise, the apparatus including: a data collection unit to collect target data stored in a ... | 03/27/2012 |
| 8145985 | Error detection schemes for a unified cache in a data processing system In a data processing system processing circuitry executes a plurality of data processing instructions. A unified cache memory stores data and instructions processed by the processing circuitry. The unified cache memory has a plurality of sets, each set having a plur... | 03/27/2012 |
| 8132076 | Method and apparatus for interleaving portions of a data block in a communication system Circuit, method, and computer program for reordering data units of a data block in accordance with a first pre-determined function. The method includes, for each data unit of the data block—(i) generating an address corresponding to a memory location of a single-p... | 03/06/2012 |
| 8132072 | System and method for providing H-ARQ rate compatible codes for high throughput applications In one embodiment, the present patent application comprises a method and apparatus to generate low rate protographs from high rate protographs, comprising copying a base graph; permuting end points of edges of a same type in copies of the base graph to produce a per... | 03/06/2012 |
| 8127198 | Adaptable channel compensation for reliable communication over fading communication links A method for reducing fading channel signal data loss for serial data rates up to approximately 10 gigabits per second includes sequentially distributing serial data to multiple encoders. Individual data bytes are sent from the encoders to a convolutional interleave... | 02/28/2012 |
| 8127199 | SDRAM convolutional interleaver with two paths An SDRAM convolutional interleaver with two paths. Symbols are assigned to a given one of the two paths, then are sorted to minimize (to one) a number of breaks in a sequential Interleaver write address. After sorting, the symbols are stored staggered in SRAM and bu... | 02/28/2012 |
| 8127208 | Method and apparatus for error management To derive a Hamming code to manage data errors a set of at least four parity bit positions is selected for parity bits which will protect a set of data bits (where each data bit has a data bit position in the data bit set). A syndrome is determined for each data bit... | 02/28/2012 |
| 8122321 | Methods of data handling Methods of data handling include receiving data having a previously-generated error correction code and generating one or more error correction codes for the data, with each error correction code corresponding to the data having one or more particular bits of the da... | 02/21/2012 |
| 8122327 | Symbol-level soft output viterbi algorithm (SOVA) and a simplification on SOVA A method and apparatus for processing symbols of a block code is presented. A sequence of symbols is received, e.g., from an inter-symbol interference (ISI) channel. A soft value is determined for each symbol using a binary trellis. ... | 02/21/2012 |
| 8117515 | Methodology and apparatus for soft-information detection and LDPC decoding on an ISI channel A system comprising a plurality of channel detectors (CDs) receiving quantized and equalized ISI channel information indicative of an LDPC codeword. The channel information is split for input to the CDs, such that each CD receives channel information indicative of a... | 02/14/2012 |
| 8112690 | Method, system, and computer program product for connection state recovery after fault A method, system, and computer program product for connection state recovery of a connection after fault in a networked channel-to-channel computer system are provided. The method includes identifying essential data in response to detecting a state change in a chann... | 02/07/2012 |
| 8112700 | Nanoscale interconnection interface One embodiment of the present invention provides a demultiplexer implemented as a nanowire crossbar or a hybrid nanowire/microscale-signal-line crossbar with resistor-like nanowire junctions. The demultiplexer of one embodiment provides demultiplexing of signals inp... | 02/07/2012 |
| 8108748 | Modulation symbol to outer codeword mapping The subject matter disclosed herein provides an outer coding framework that, in some implementations, provides frequency diversity to outer codewords that are mapped to modulation symbols. In one aspect, there is provided a method. The method may include inserting a... | 01/31/2012 |
| 8103938 | Increasing the effectiveness of error correction codes and operating multi-level memory systems by using information about the quality of the stored data The quality of data stored in a memory system is assessed by different methods, and the memory system is operated according to the assessed quality. The data quality can be assessed during read operations. Subsequent use of an Error Correction Code can utilize the q... | 01/24/2012 |
| 8103931 | Method for constructing large-girth quasi-cyclic low-density parity-check codes A method constructs a code, wherein the code is a large-girth quasi-cyclic low-density parity-check code. A base matrix is selected for the code. A cost matrix corresponding to the base matrix is determined. A single element in the base is changed repeatedly maximiz... | 01/24/2012 |
| 8103933 | Method for securing data and device for implementing the same A method and system to ensure the integrity of data in a data-processing device, a data packet is read from a memory and checked to determine whether the data packet is an existing code word of a predefined first code, and if the data packet is an existing code word... | 01/24/2012 |
| 8095846 | Data coding apparatus and methods Data encoding apparatus and methods are disclosed. A Cyclic Redundancy Check (CRC) coding module is selected, from a plurality of different CRC coding modules, for coding a block of information. A generic coder, which is configurable to perform CRC coding based on a... | 01/10/2012 |
| 8086939 | XOR circuit, RAID device capable of recovering a plurality of failures and method thereof An XOR circuit, a RAID device which can recover several failures and method thereof are provided. A Galois field data recovery circuit having two or more sets of Galois Field engine circuits which are used in the XOR circuit, is one which can generate high efficient... | 12/27/2011 |
| 8086941 | Computing an error detection code syndrome based on a correction pattern The present invention is all error detection and correction scheme that enables the use of Horner's algorithm for the computation of EDC syndromes from the computed error pattern. Specifically, “transformed” EDC syndromes are computed during the read back of dat... | 12/27/2011 |
| 8086932 | Apparatus and method for decoding low-density parity check code There is provided with a decoding apparatus for decoding a low-density parity check code defined by a parity check matrix, includes: a first operation unit configured to carry out a row operation for each row of the parity check matrix; a calculation unit configured... | 12/27/2011 |
| 8082485 | Method and apparatus for detecting Viterbi decoder errors due to quasi-catastrophic sequences A Viterbi decoder includes a decision generator configured to generate a full decision output. An error detector is configured to detect errors in the full decision output and generate a signal when the full decision output errors are detected. ... | 12/20/2011 |
| 8082481 | Multiple CRC insertion in an output data stream A computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes receiving a message to transmit from the channel subsystem to... | 12/20/2011 |
| 8078949 | Semiconductor memory device A semiconductor memory device includes: a parity generating circuit for generating parity data corresponding to input data; a normal data latching section for latching the input data or data read out from the normal memory cell array; an input selection circuit for ... | 12/13/2011 |
| 8078934 | Communication method and apparatus In a frame sync method, a receiver searches for the presence of an N-symbol long unique word pattern. For each possible frame sync detected, the receiver proceeds to demodulation and FEC processing. After each iteration of the FEC decoder, the detected unique word p... | 12/13/2011 |
| 8074138 | Decoding apparatus and method thereof In a decoding apparatus in a portable Internet terminal, a channel encoded symbol received from a transmitter is decoded by one of a chase-combining scheme and a code-combining scheme selected based on an ID value of the subpacket indicating a start position of the ... | 12/06/2011 |
| 8074137 | Method and system for supporting multiple hybrid automatic repeat request processes per transmission time interval A method and system for supporting multiple hybrid automatic repeat request (H-ARQ) processes per transmission time interval (TTI) are disclosed. A transmitter and a receiver include a plurality of H-ARQ processes to transmit and receive multiple transport blocks (T... | 12/06/2011 |
| 8065581 | Feedback for data transmissions Methods and apparatus are presented for dynamically controlling the re-transmission scheme of acknowledgment signals. A source transmits a first data packet over a slot s1. If channel conditions are favorable, source transmits a second data packet over sl... | 11/22/2011 |
| 8065587 | Reduced complexity ARP (almost regular permutation) interleaves providing flexible granularity and parallelism adaptable to any possible turbo code block size Reduced complexity ARP (almost regular permutation) interleaves providing flexible granularity and parallelism adaptable to any possible turbo code block size. A novel means is presented by which any desired turbo code block size can be employed when only requiring,... | 11/22/2011 |
| 8065580 | Redundant transmission of data messages for information and control for HVDC transmission systems A method for securely transmitting data messages in an HVDCT system. Each transmitting unit is connected to each receiving unit via at least two connection channels. Each data message includes a message counter that uniquely characterizes the data message, and each ... | 11/22/2011 |
