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A self defense weapon formed as a memo pad and which is easily held by a person's fingers, therefore making it possible to provide protection from a mugger and also to quickly and easily write a record or a message without failure of missing or forgetting significant information under a stressful situation.
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| Number | Title | Issue Date |
| 7391055 | Capacitor, semiconductor device and manufacturing method thereof A highly reliable capacitor, a semiconductor device having high operating performance and reliability, and a manufacturing method thereof are provided. A capacitor formed of a first conductive film 102, a dielectric 103 made of an insulating material, ... | 06/24/2008 |
| 7196395 | Semiconductor device and manufacturing method The object is the present invention is to provide a semiconductor device including a circuit employing two or more field-effect transistor that are desired to have equal characteristics, capable of realizing high reliability and superior transistor characteristics. ... | 03/27/2007 |
| 7161178 | Display device having a pixel electrode through a second interlayer contact hole in a wider first contact hole formed over an active region of display switch There is provided a combination of doping process and use of side walls which allows the source and drain of a thin film transistor of an active matrix circuit to be doped with only one of N-type and P-type impurities and which allows the source and drain of a thin ... | 01/09/2007 |
| 7151278 | Pulse output circuit, shift register, and display device A circuit is provided which is constituted by TFTs of one conductivity type, and which is capable of outputting signals of a normal amplitude. When an input clock signal CK1 becomes a high level, each of TFTs (101, 103) is turned on to settle at a low ... | 12/19/2006 |
| 7138659 | LED assembly with vented circuit board A light emitting diode (LED) assembly with a vented printed circuit board is disclosed. A printed circuit board assembly may include a plurality of LED modules disposed in an array with a multilayered substrate and a plurality of vents. The multilayer substrate may ... | 11/21/2006 |
| 7138722 | Semiconductor device Described herein is a stacked package according to the present invention, wherein a plurality of tape carriers which seal semiconductor chips, are multilayered in upward and downward directions. In the stacked package, one ends of leads formed over the whole surface... | 11/21/2006 |
| 7135732 | Semiconductor device In order to supply a semiconductor device having high-reliability, there are used a first capacitor electrode, a capacitor insulating film formed in contact with the first capacitor electrode and mainly composed of titanium oxide, and a second capacitor electrode fo... | 11/14/2006 |
| 7129570 | Electronic component having at least one semiconductor chip on a circuit carrier and method for producing the same An electronic component includes at least one semiconductor chip, which has an active chip top side with contact areas and has a chip rear side arranged on a carrier top side of a circuit carrier. The circuit carrier and the chip top side are covered by a common rew... | 10/31/2006 |
| 7126169 | Semiconductor element The present invention provides a semiconductor element in which the field-effect transistor and the Schottky diode are arranged such that a depletion layer stemming from the Schottky diode is superimposed on a depletion layer stemming from a junction between a secon... | 10/24/2006 |
| 7109517 | Method of making an enhanced optical absorption and radiation tolerance in thin-film solar cells and photodetectors Subwavelength random and periodic microscopic structures are used to enhance light absorption and tolerance for ionizing radiation damage of thin film and photodetectors. Diffractive front surface microscopic structures scatter light into oblique propagating higher ... | 09/19/2006 |
| 7109554 | Thin film semiconductor device and method for manufacturing same In a semiconductor device having an N-channel MOS transistor and a P-channel MOS transistor, each of the N-channel and P-channel MOS transistors is made up of a polycrystal silicon layer, a gate insulating film, and a gate electrode containing a gate polysilicon on ... | 09/19/2006 |
| 7105371 | Method of acquiring an image from an optical structure having pixels with dedicated readout circuits An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells in... | 09/12/2006 |
| 7102159 | Ultra thin image sensor package structure and method for fabrication An image sensor package having at least one chip supporting bar secured to a top surface of an image sensor chip. The thickness of the chip supporting bar is absorbed within a vertical dimension of wire loops that connect bonding pads to leads so that the chip suppo... | 09/05/2006 |
| 7098489 | Split type light receiving element and circuit-built-in light-receiving element and optical disk drive A plurality of N-type diffusion layers are formed a specified distance apart on a P-type semiconductor layer. A P-type leak prevention layer formed between at least N-type diffusion layers prevents leaking between the diffusion layers. A dielectric film is formed in... | 08/29/2006 |
| 7098119 | Thermal anneal process for strained-Si devices A method is disclosed for forming a semiconductor device using strained silicon. After forming a first substrate material with a first natural lattice constant on a device substrate and a second substrate material with a second natural lattice constant on the first ... | 08/29/2006 |
| 7098480 | Thin film transistor array panel and a method for manufacturing the same Disclosed is a simplified method for manufacturing a liquid crystal display. A gate wire including a gate line, a gate pad, and a gate electrode are formed on a substrate. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially de... | 08/29/2006 |
| 7098481 | Semiconductor device In a semiconductor device having a plurality of thin film transistors and matrix wiring lines formed on a substrate, the matrix wiring lines are electrically connected via resistors in order to prevent electrostatic destructions during a panel manufacture process an... | 08/29/2006 |
| 7098500 | Ultra dense trench-gated power device with the reduced drain-source feedback capacitance and miller charge The cellular structure of the power device includes a substrate that has a highly doped drain region. Over the substrate there is a more lightly doped epitaxial layer of the same doping. Above the epitaxial layer is a well region formed of an opposite type doping. C... | 08/29/2006 |
| 7098522 | High voltage device with ESD protection A high voltage device. A high voltage MOS transistor is applied in the ESD protection device to the structure of which a doped region is added, generating a parasitic semiconductor controlled rectifier (SCR) having a shorter discharge path such that the SCR has fast... | 08/29/2006 |
| 7094707 | Method of forming nitrided oxide in a hot wall single wafer furnace A method of nitriding a gate oxide layer by annealing a preformed oxide layer with nitric oxide (NO) gas in a hot wall, single wafer furnace is provided. The nitridation process can be carried out rapidly (i.e., at nitridation times of 30 seconds to 2 minutes) while... | 08/22/2006 |
| 7095065 | Varying carrier mobility in semiconductor devices to achieve overall design goals A semiconductor device may include a substrate and an insulating layer formed on the substrate. A first device may be formed on the insulating layer, including a first fin. The first fin may be formed on the insulating layer and may have a first fin aspect ratio. A ... | 08/22/2006 |
| 7095050 | Voltage-matched, monolithic, multi-band-gap devices Monolithic, tandem, photonic cells include at least a first semiconductor layer and a second semiconductor layer, wherein each semiconductor layer includes an n-type region, a p-type region, and a given band-gap energy. Formed within each semiconductor layer is a st... | 08/22/2006 |
| 7091516 | Optoelectronic devices An optoelectronic device comprising a photoresponsive region located between first and second electrodes such that charge carriers can move between the photoresponsive region and the first and second electrodes, the photoresponsive region comprising: a stack of alte... | 08/15/2006 |
| 7091600 | Prevention of post CMP defects in CU/FSG process A common problem associated with damascene structures made of copper inlaid in FSG (fluorinated silicate glass) is the formation of defects near the top surface of the structure. The present invention avoids this problem by laying down a layer of USG (undoped silica... | 08/15/2006 |
| 7087925 | Semiconductor device having reduced capacitance to substrate and method In one embodiment, a matrix of free-standing semiconductor shapes are oxidized to form a low capacitance isolation tub. The adjacent rows of shapes in the matrix are offset with respect to each to minimize air gap and void formation during tub formation. In a furthe... | 08/08/2006 |
| 7087974 | Semiconductor integrated circuit including anti-fuse and method for manufacturing the same An anti-fuse is manufactured by forming an isolation region including an insulating material layer buried in a surface of a device formation region on a surface of a semiconductor substrate, and by forming diffusion regions at both sides of the isolation region, the... | 08/08/2006 |
| 7087983 | Manufacturing methods of semiconductor devices and a solid state image pickup device A manufacturing method of manufacturing a semiconductor device having a plurality of wiring layers. The method includes the steps of forming a wiring by a first wiring layer as a pattern by dividing a desired pattern into a plurality of patterns, connecting the divi... | 08/08/2006 |
| 7087473 | Method of forming conventional complementary MOS transistors and complementary heterojunction MOS transistors on common substrate A semiconductor integrated circuit fabrication method according to this invention includes: a step of forming a pair of first device forming regions and a pair of second device forming regions in a surface layer portion of a semiconductor substrate by surrounding ea... | 08/08/2006 |
| 7084478 | Load resistor with dummy contact substantially free of charge build up during etching process A semiconductor device with a load resistor is manufactured such that a contact is formed at both ends of the load resistor, and at least one contact is formed between the contacts, in order to prevent impurities from being generated within each contact while the co... | 08/01/2006 |
| 7084429 | Strained semiconductor by wafer bonding with misorientation One aspect of the present invention relates to a method for forming a strained semiconductor structure. In various embodiments, at least two strong bonding regions are defined for a desired bond between a crystalline semiconductor membrane and a crystalline semicond... | 08/01/2006 |
| 7084444 | Method and apparatus for improving efficiency in opto-electronic radiation source devices A method for improving the efficiency for an optoelectronic device, such as semiconductor lasers, Superluminescence Light Emitting Diodes (SLDs), Gain Chips, optical amplifiers is disclosed, see FIG. 4B. In accordance with the principles of the invention, at ... | 08/01/2006 |
| 7078748 | Multi-layer gate stack structure comprising a metal layer for a FET device, and method for fabricating the same A multi-layer gate stack structure of a field-effect transistor device is fabricated by providing a gate electrode layer stack with a polysilicon layer, a transition metal interface layer, a nitride barrier layer and then a metal layer on a gate dielectric, wherein ... | 07/18/2006 |
| 7078747 | Semiconductor device having a HMP metal gate A semiconductor device has a dual-gate electrode structure. The gate electrode has a layered structure including a doped polysilicon film, WSi2 film, WN film and a W film. The WSi2 film formed on the polysilicon film in the P-channel area is fo... | 07/18/2006 |
| 7078278 | Dual-metal CMOS transistors with tunable gate electrode work function and method of making the same A dual-metal CMOS arrangement and method of making the same provides a substrate and a plurality of NMOS devices and PMOS devices formed on the substrate. Each of the plurality of NMOS devices and PMOS devices have gate electrodes. Each NMOS gate electrode includes ... | 07/18/2006 |
| 7078337 | Selective isotropic etch for titanium-based materials A process for etching a sacrificial layer of a structure. The structure is exposed to a plasma derived from nitrogen trifluoride for etching the sacrificial layer. The process is selective in that it etches titanium-nitride and titanium but does not affect adjacent ... | 07/18/2006 |
| 7075145 | Poly-sealed silicide trench gate Power MOSFETs and fabrication processes for power MOSFETs use a continuous conductive gate structure within trenches to avoid problems arising from device topology caused when a gate bus extends above a substrate surface. The gate bus trench and/or gate structures i... | 07/11/2006 |
| 7075155 | Structure for protecting a semiconductor circuit from electrostatic discharge and a method for forming the structure A structure for protecting a semiconductor circuit from electrostatic discharge is provided. The structure comprises a semiconductor substrate of a first conductivity type having two wells of a second conductivity type spaced laterally apart. The wells each comprise... | 07/11/2006 |
| 7075149 | Semiconductor device and its manufacturing method A semiconductor device comprises: a semiconductor layer of a first conductivity type; a first semiconductor pillar layer of the first conductivity type; a second semiconductor pillar layer of a second conductivity type; a third semiconductor pillar layer of the firs... | 07/11/2006 |
| 7071536 | Semiconductor device and manufacturing method thereof A high voltage semiconductor device having a high current gain hFE is formed with a collector region (20) of a first conduction type, an emitter region (40) of the first conduction type, and a base region (30) of a second conduction type opposit... | 07/04/2006 |
| 7071500 | Semiconductor device and manufacturing method for the same A bipolar semiconductor device including a collector layer covered at a portion of an outer periphery thereof with an insulating film and having a shape extending in an upper direction and a horizontal direction, with a gap being formed between the collector layer a... | 07/04/2006 |
