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| Number | Title | Issue Date |
| 6043511 | Thin film transistor array panel used for a liquid crystal display having patterned data line components A gate insulating layer, an amorphous silicon layer, an n+ amorphous silicon layer and a metal layer are deposited in sequence after a gate line, and a gate electrode and a gate pad are formed on a substrate. The metal layer forms a data line, ... | 03/28/2000 |
| 6008508 | ESD Input protection using a floating gate neuron MOSFET as a tunable trigger element Disclosed is a floating gate neuron MOS transistor that may be incorporated into devices such as low voltage silicon control rectifiers for protection of internal circuits against electrostatic discharge. The transistor includes two or more input gates ca... | 12/28/1999 |
| 5962902 | Semiconductor CMOS device with circuit for preventing latch-up A semiconductor device has a substrate bias generating circuit for generating a substrate bias to be applied to a p-type semiconductor substrate, a CMOS circuit formed on the semiconductor substrate, and a latch-up protection circuit. The latch-up protect... | 10/05/1999 |
| 5936292 | Structure of thin film transistor and gate terminal having a capacitive structure composed of the TFT elements A thin film transistor of an active matrix liquid crystal display unit has a gate electrode continued to a gate terminal supplied with a gate control signal, a gate insulating layer formed beneath the gate electrode and the gate terminal, source and drain... | 08/10/1999 |
| 5923059 | Integrated circuit cell architecture and routing scheme A CMOS cell architecture and routing technique is optimized for three or more interconnect layer cell based integrated circuits such as gate arrays. First and second layer interconnect lines are disposed in parallel and are used as both global interconnec... | 07/13/1999 |
| 5920089 | Multi-power supply integrated circuit and system employing the same There is disclosed a multi-power supply integrated circuit including a first pMOS transistor which is formed in a first n-well and operated at a first supply voltage and a second pMOS transistor which is formed in a second n-well and operated at a second ... | 07/06/1999 |
| 5910672 | Semiconductor device and method of manufacturing the same This invention provides a semiconductor device with a SOI structure and a method of manufacturing the same, preventing deterioration in and making improvement in device characteristics. Nitrogen ion implantation into NMOS and PMOS regions (NR, PR) with re... | 06/08/1999 |
| 5907190 | Semiconductor device having a cured silicone coating with non uniformly dispersed filler A semiconductor device in which the surface of the semiconductor element is coated with a cured silicone in which there is dispersed filler having an average particle diameter of 0.01 to 500 micrometers and a specific gravity of 0.01 to 0.95 characterized... | 05/25/1999 |
| 5903028 | Static and monolithic current limiter and circuit-breaker The present invention relates to a static and monolithic current limiter and circuit-breaker component including, between two terminals, a one-way conduction current limiter, a sensor of the voltage between the terminals, and a mechanism for inhibiting th... | 05/11/1999 |
| 5898194 | Integrated circuit cell architecture and routing scheme A CMOS cell architecture and routing technique is optimized for three or more interconnect layer cell based integrated circuits such as gate arrays. First and second layer interconnect lines are disposed in parallel and are used as both global interconnec... | 04/27/1999 |
| 5895958 | Input protection circuit for use in semiconductor device having an improved electrostatic breakdown voltage In an input protection circuit, a bipolar protection device is constituted of a semiconductor substrate of a first conductivity type, a first diffused layer of a second conductivity type formed in the substrate and connected to an input signal pad, a seco... | 04/20/1999 |
| 5895935 | Display device having a switch with floating regions in the active layer A display device having high definition and high reliability, and technology for manufacturing the same. In an active matrix type display device of integrated peripheral driving circuit type, pixel TFTs of an active matrix circuit 100 are not provided wit... | 04/20/1999 |
| 5894137 | Semiconductor device with an active layer having a plurality of columnar crystals There is provided a technique for fabricating a thin film transistor having excellent performance. A configuration is employed in which when the thin film transistor is in an on-state, the flowing direction of the on-current coincides with the direction o... | 04/13/1999 |
| 5894136 | Liquid crystal display having a bottom gate TFT switch having a wider active semiconductor layer than a conductive layer on same A liquid crystal display includes a substrate, a gate electrode on the substrate, a gate insulating layer on the substrate and the gate electrode, a first semiconductor layer on the gate insulating layer, a second semiconductor layer on the first semicond... | 04/13/1999 |
| 5886365 | Liquid crystal display device having a capacitator in the peripheral driving circuit A small-size and large-capacitance capacitor is provided for the peripheral driving circuit of a liquid crystal display device. A capacitor exhibiting crystalline property is provided on a monocrystalline silicon in the peripheral driving circuit of a liq... | 03/23/1999 |
| 5886382 | Trench transistor structure comprising at least two vertical transistors A method for forming a trench transistor structure begins by forming a buried layers (12 and 16) and a doped well (22) in a substrate (10) via epitaxial growth processing. A trench region (24) is then etched into the substrate (10) to expose a the layer (... | 03/23/1999 |
| 5883399 | Thin film transistor having double channels and its manufacturing method This invention provides a method for manufacturing a this film transistor which comprised the steps of providing an oxide layer; etching a portion of the oxide layer so that a recess is formed; forming a first channel layer on the resulting structure; for... | 03/16/1999 |
| 5883419 | Ultra-thin MO-C film transistor A transistor in accordance with the invention comprises an ultra-thin Mo--C film functioning as a channel for an electron flow with two ends of the thin metal film functioning as source and drain terminals of the transistor, respectively; a piezoelectric ... | 03/16/1999 |
| 5877520 | Trench lateral overflow drain antiblooming structure for virtual phase charge coupled devices with virtual gate element The lateral overflow drain for charge coupled devices includes: a semiconductor region 70 of a first conductivity type having a trench 92; a drain region 24 of a second conductivity type below the trench 92; a gate 20 in the trench 92 overlying and separa... | 03/02/1999 |
| 5874745 | Thin film transistor with carbonaceous gate dielectric A gate dielectric layer comprising a carbon film aligned to, and continuously covering, the gate electrode. The carbon dielectric film adheres to a wide variety of gate metals and is readily etched using etch processes which do not etch into the gate meta... | 02/23/1999 |
| 5869886 | Flip chip semiconductor mounting structure with electrically conductive resin A semiconductor chip is flip chip bonded on a substrate wherein the semiconductor chip has a first surface on which bumps are provided. An insulating sealing resin is provided in a space defined between the semiconductor chip and the substrate and also ar... | 02/09/1999 |
| 5866919 | TFT array having planarized light shielding element An LCD includes a substrate; a transistor over the substrate, the transistor having a gate, a source, and a drain; a light shielding layer over the transistor; a transparent insulating layer at sides of the light shielding layer, the transparent insulatin... | 02/02/1999 |
| 5864149 | Staggered thin film transistor with transparent electrodes and an improved ohmic contact structure A multi-layer structure of source/drain electrodes and an amorphous silicon layer in a forward staggered thin film transistor. Source/drain electrodes are selectively provided on an insulator. Each of the source/drain electrodes comprises an undoped trans... | 01/26/1999 |
| 5864147 | Field emission device having configuration for correcting deviation of electron emission direction A field emission device is configured so as to suppress any deviation of the central axis of the distribution of emitted electrons from a conical cathode, with no electrode in addition to the gate electrode. A conductive layer is disposed over an insulati... | 01/26/1999 |
| 5861644 | High-frequency traveling wave field-effect transistor A method of improving the performance of a traveling wave field-effect transistor operated at frequencies in the microwave range or above the microwave range comprising the steps of forming a depletion region beneath a gate electrode wherein, in a plane t... | 01/19/1999 |
| 5859446 | Diode and power converting apparatus In a diode, the backward length L of an anode electrode in a region, where a semiconductor layer of a p+ conductivity type and an anode electrode do not contact each other, is made longer than the diffusion length of holes in a semiconductor l... | 01/12/1999 |
| 5859469 | Use of tungsten filled slots as ground plane in integrated circuit structure A semiconductor device having the base and collector surrounded by a continuous tungsten filled slot as ground plane. The portion of the tungsten filled slot over the buried layer extends beyond the surface of the buried layer and the portion of the tungs... | 01/12/1999 |
| 5859463 | Photosensitive imager contact pad structure A method of forming a contact for a photosensitive element of a photosensitive imager including a common electrode separated from a bottom contact by intervening layers of an SiOx transistor passivation layer over the bottom contact and an SiNx diode pass... | 01/12/1999 |
| 5856683 | MOS-controlled thyristor using a source cathode elecrode as the gate electrode of a MOSFET element A MOS-gate switched power semiconductor component with a semiconductor body that has a number of unit cells arranged side-by-side and switched in parallel and consisting of a p-emitter zone adjacent to the anode, an adjoining, weakly doped n-base zone, th... | 01/05/1999 |
| 5852315 | N-sided polygonal cell layout for multiple cell transistor A MOS transistor cell is disclosed for a multiple cell MOS transistor, such as in an ESD protection circuit, output buffer, etc. The transistor cell has a regular n-sided polygonal geometry, wherein nࣙ8. A drain region is provided in a substrate which o... | 12/22/1998 |
| 5852305 | Liquid crystal display apparatus with repair structure A liquid crystal display having a TFT cell array including a plurality of gate lines formed in parallel on a substrate and a plurality of data lines formed perpendicularly to the gate lines. The plurality of gate lines have gate pads at one end, while the... | 12/22/1998 |
| 5852321 | Thermal type infrared radiation solid state image pick-up device A thermal type infrared radiation solid state image pick-up device includes a temperature-electrical signal converting function element and a heat isolation structural body supporting the temperature-electrical signal converting function element. The heat... | 12/22/1998 |
| 5850105 | Substantially planar semiconductor topography using dielectrics and chemical mechanical polish A method for forming a multilevel interconnect structure having a globally planarized upper surface. Dielectrics are deposited upon a semiconductor to minimize pre-existing disparities in topographical height and to create an upper surface topography havi... | 12/15/1998 |
| 5847423 | Semiconductor device having a thin film capacitor and a resistance measuring element A semiconductor device having thin film capacitors and containing resistance measuring elementsis disclosed. The thin film capacitor comprises a bottom electrode, a high permittivity dielectric, and a top electrode stacked on an interlayer insulation film... | 12/08/1998 |
| 5847409 | Semiconductor device with superlattice-structured graded buffer layer and fabrication method thereof A semiconductor device that enables to prevent the electron transport property of a semiconductor active layer from degrading even if a semiconductor compositionally-graded buffer layer is used. This device contains a semiconductor substrate, a semiconduc... | 12/08/1998 |
| 5844255 | Structure of liquid crystal display device for antireflection The i-type semiconductor layer (AS) and the gate insulating film (GI) are patterned along and in the same shape as the video signal lines (DL) between the video signal lines (DL) and the first transparent glass substrate (SUB1 ). The backlight is disposed... | 12/01/1998 |
| 5844259 | Vertical conduction MOS controlled thyristor with increased IGBT area and current limiting An MCT is formed as a four-layer device, using alternating cells of: (a) P diffusions in an N- wafer having lower N+ and P+ layers with N+ cathode regions in the P diffusions, and (b) shallow P+ diver... | 12/01/1998 |
| 5838026 | Insulated-gate semiconductor device An insulated-gate semiconductor device comprises a P type emitter layer, an N- high-resistive base layer formed on the P type emitter layer, and a P type base layer contacting the N- high-resistive base layer. A plurality of trench... | 11/17/1998 |
| 5838023 | Ancillary pads for on-circuit array probing composed of I/O and test pads An integrated circuit device is provided that has I/O bonding pads across the surface of the chip, where the I/O bonding pads can be electrically accessed via ancillary testing pads in order to perform functionality or other necessary tests prior to bump ... | 11/17/1998 |
| 5838051 | Tungsten policide contacts for semiconductor devices A method for creating manufacturable polycide contacts, for use in advanced semiconductor designs using images as small as 0.35 uM, has been developed. An amorphous silicon film, is used as an underlay, to assist in the growth of an overlying tungsten sil... | 11/17/1998 |
