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| Number | Title | Issue Date |
| 6649448 | Method of manufacturing a semiconductor device having flexible wiring substrate Peeling between a molding resin and a substrate is prevented to improve the quality of a semiconductor device. A film substrate capable of being deformed following shrinkage upon curing of a molding resin and having plural partitioned device areas is prov... | 11/18/2003 |
| 6646460 | Parallel scan distributors and collectors and process of testing integrated circuits An integrated circuit (70) having parallel scan paths (824-842, 924-942) includes a pair or pairs of scan distributor (800,900) and scan collector (844,944) circuits. The scan paths apply stimulus test data to functional circuits (702) on the integrated c... | 11/11/2003 |
| 6609977 | External interfaces for a 3D graphics system An advantageous set of external interfaces for home video game platform provide modularity and expandability while maintaining and preserving the proprietary nature of the platform. A disk drive interface provides flexible communications with an internal ... | 08/26/2003 |
| 6607929 | Device and method for testing sensitive elements on an electronic chip A method and device for testing an electronic chip (10) having on the surface a plurality of addressable electrically conductive sensitive elements (12) in which the sensitive elements on the chip are put in contact with a conductive solution (52), one or... | 08/19/2003 |
| 6589822 | Manufacturing method for top-gate type and bottom-gate type thin film transistors A microcrystal silicon film is formed on a substrate by using a silicide gas, a hydrogen gas, and a source gas that enables introduction of a metal element for accelerating crystallization of silicon in a capacitance-coupling plasma CVD apparatus. The act... | 07/08/2003 |
| 6548321 | Method of anodically bonding a multilayer device with a free mass A method of anodically bonding a multilayer device with a free mass includes positioning a support layer on either side of a free mass structure including a free mass with an electrode on each layer proximate the free mass; connecting both electrodes and ... | 04/15/2003 |
| 6541343 | Methods of making field effect transistor structure with partially isolated source/drain junctions A microelectronic structure includes at least one source/drain terminal of a first conductivity type that is partially isolated from a region of semiconductor material of a second conductivity type. In a further aspect of the invention, a process for form... | 04/01/2003 |
| 6537853 | Overmolding encapsulation process A method of encapsulating an article having first and second surfaces, includes positioning the article on a carrier such that at least a portion of the first surface contacts the carrier. A portion of the carrier carrying the article is then positioned w... | 03/25/2003 |
| 6534343 | Method of making electrically isolated power semiconductor package A packaged power semiconductor device (24) with voltage isolation between a metal backside (34) and the terminals (38) of the device. A direct-bonded copper ("DBC") substrate (28) is used to provide electrical isolation and good thermal transfer from the ... | 03/18/2003 |
| 6534341 | Methods of wafer level fabrication and assembly of chip scale packages A method for producing integrated circuit devices comprises the steps of forming and packaging such devices at the wafer scale, including forming a plurality of chip circuits with bond pads, adhesively fixing a plate of glass to the active surface of the ... | 03/18/2003 |
| 6531417 | Thermally driven micro-pump buried in a silicon substrate and method for fabricating the same The present invention relates to a micro electro mechanical system (MEMS); and, more particularly, to a micro pump used in micro fluid transportation and control and a method for fabricating the same. The micro pump according to the present invention comp... | 03/11/2003 |
| 6528334 | Semiconductor inspection system, and method of manufacturing a semiconductor device There are described a semiconductor inspection system for inspecting recessed defects formed in a semiconductor wafer and a semiconductor device manufacturing method including an inspection step of inspecting recessed defects formed in a semiconductor waf... | 03/04/2003 |
| 6528383 | Simultaneous formation of deep trench capacitor and resistor A compact resistor is formed in an integrated circuit using many of the same steps as are employed in forming a trench capacitor for a DRAM cell; in particular depositing a layer of heavily doped germanium in the trench interior after the step of doping t... | 03/04/2003 |
| 6528335 | Electrical method for assessing yield-limiting asperities in silicon-on-insulator wafers An electrical method is described for determining the presence of certain defects in the buried oxide of silicon-on-insulator wafers which cause electrical breakdown at voltages low enough to cause failure during circuit processing. The method consists of... | 03/04/2003 |
| 6524977 | Method of laser annealing using linear beam having quasi-trapezoidal energy profile for increased depth of focus A linear pulse laser beam to be applied to an illumination surface is so formed as to have, at the focus, an energy profile in the width direction which satisfies inequalities 0.5L1ࣘL2ࣘL1 and 0.5L1ࣘL3ࣘL1 where assuming that a maximum energy is 1, ... | 02/25/2003 |
| 6521469 | Line monitoring of negative bias temperature instabilities by hole injection methods A process for in-line testing of a metal-oxide-semiconductor field effect transistor (MOSFET) device for negative bias thermal instability (NBTI), which degrades the gate oxide of the MOSFET device. The process generally comprises four steps. First, a hol... | 02/18/2003 |
| 6521466 | Apparatus and method for semiconductor wafer test yield enhancement An improved semiconductor wafer processing system includes defect detection equipment and defect eradication equipment. The defect eradication equipment is a supercritical fluid cleaning apparatus. The defect detection equipment creates a record for each ... | 02/18/2003 |
| 6521467 | Characterizing semiconductor wafers with enhanced S parameter contour mapping A system, and methods of its use, for characterizing semiconductor wafers with enhanced S parameter contour mapping employ small signal scatter parameter measurements of a representative sample of die to create a contour map of a wafer surface. Those die ... | 02/18/2003 |
| 6518593 | Integrated circuit and method of designing integrated circuit An integrated circuit has a functional circuit for achieving an actual operation function of the integrated circuit, and a redundant circuit for replacing a defective circuit within the functional circuit. This integrated circuit has I/O regions for signa... | 02/11/2003 |
| 6518102 | Method for manufacturing transistor semiconductor devices with step of annealing to getter metal with phosphorous A method for producing a thin-film transistor by using a crystalline silicon film that has been formed by using nickel as a metal element for accelerating crystallization of silicon. In forming source and drain regions, phosphorus as an element for getter... | 02/11/2003 |
| 6514799 | Method for substrate noise distribution A method is disclosed for noise distribution in high resistivity substrates containing differential or balanced integrated circuitry obtaining a noise suppression by an introduction of noise distributors. Noise from an external noise source (5) is made is... | 02/04/2003 |
| 6514776 | Instrument and method for measuring contamination of wafer surface There is described an instrument capable of immediately and accurately extracting contaminants from solely either side of a wafer surface or from a certain area on the wafer surface. O-rings, each of which is partially cut, are attached to respective side... | 02/04/2003 |
| 6514797 | Underfill applications using film technology A method and apparatus are provided for assembling a semiconductor package. The invention uses a thin release film placed over package components in a mold cavity. The release film is drawn down over the assembled components and envelops the assembled com... | 02/04/2003 |
| 6512390 | Detecting device for a switch matrix A device and a method for testing a switch matrix used in semiconductor equipment and its ring connector are provided by the present invention. The switch matrix contains a test fixture adapter and the ring connector, and the ring connector comprises a pl... | 01/28/2003 |
| 6500684 | Method and apparatus of manufacturing semiconductor device A method of manufacturing a semiconductor device comprising the steps of: preparing a flexible substrate which includes a base substrate having a light transmission property and an interconnecting pattern formed on one surface of the base substrate, the f... | 12/31/2002 |
| 6500722 | Inductor recognition method, layout inspection method, computer readable recording medium in which a layout inspection program is recorded and process for a semiconductor device An inductor recognition method for recognizing an inductor, a layout inspection method wherein it is possible to automatically carry out a verification of a design standard, in the inductor and a process for a semiconductor device using this layout inspec... | 12/31/2002 |
| 6500704 | Semiconductor device, display device and method of fabricating the same A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment meth... | 12/31/2002 |
| 6498047 | Apparatus and method for measuring wafer clamping tension A wafer clamping tension measuring apparatus includes a base plate having a guide groove formed in an upper surface and a moving plate having a guide rail protruding from a lower surface and reciprocating with the guide groove. A tension gauge is fixed to... | 12/24/2002 |
| 6495882 | Short-channel schottky-barrier MOSFET device A MOSFET device and method of fabricating are disclosed. The present invention utilizes Schottky barrier contacts for source and/or drain contact fabrication within the context of a MOSFET device structure to eliminate the requirement for halo/pocket impl... | 12/17/2002 |
| 6496788 | Data processing method and apparatus to determine killer ratio based on a variety of defect types When a killer ratio resulting from a specified defect is calculated from die research data including the number of defects and manufacturing result pass/fail for each of a plurality of dies, the die research data is classified based on the number of the s... | 12/17/2002 |
| 6492207 | Method for making a pedestal fuse A structure and method of fabricating a metallization fuse line is disclosed. The structure can be formed on a semiconductor substrate, including an insulator structure formed on the substrate, the insulator structure having an upper layer and a lower lay... | 12/10/2002 |
| 6492648 | Lamp annealing apparatus and method of manufacturing semiconductor device To provide a lamp annealing apparatus, which prevents clouding of a reflector, achieves stability of temperature for heat-treatment and prevents oxidization of a front surface of a semiconductor wafer. The lamp annealing apparatus includes a lamp unit 1 f... | 12/10/2002 |
| 6491758 | CVD apparatus equipped with moisture monitoring A CVD apparatus is able to efficiently perform purging treatment after maintenance by using for the purge gas a mixed gas of a high thermal conductivity and an inert gas. Purging treatment before semiconductor film formation is performed by repeating the ... | 12/10/2002 |
| 6492192 | Method of making a Schottky diode in an integrated circuit A method of forming an integrated circuit including a Schottky diode includes providing a substrate of a first conductivity type, defining a region of a second conductivity type relative to the substrate and forming an insulator over the second conductivi... | 12/10/2002 |
| 6486528 | Silicon segment programming apparatus and three terminal fuse configuration The present invention is a method and apparatus for programming a stack of segments wherein each segment includes a plurality of die which are interconnected through metal interconnects patterned on the surface of each segment. Once the segments are arran... | 11/26/2002 |
| 6485990 | Feed-forward control of an etch processing tool A method includes measuring a surface non-uniformity of a wafer. A current state of an etch processing tool is determined. The surface non-uniformity of the wafer is compared with the current state of the processing tool. An operating parameter of the pro... | 11/26/2002 |
| 6482661 | Method of tracking wafers from ingot A method and system for manufacturing a silicon wafer is disclosed. The ingot's crystallographic orientation is identified. Then ingot indicia is marked onto the ingot. The ingot indicia includes the manufacturer's data as well as the ingot's specific inf... | 11/19/2002 |
| 6479841 | Power component state detector A detector of the state (on or off) of a vertical power component formed in a lightly-doped semiconductor substrate of a first conductivity type having a front surface and a rear surface. The region corresponding to the power component is surrounded with ... | 11/12/2002 |
| 6479357 | Method for fabricating semiconductor device with copper gate electrode A method for fabricating a semiconductor device including the steps of: forming a gate insulation film on the upper surface of a semiconductor substrate; forming a dummy layer pattern on the upper surface of the gate insulation film; forming an insulating... | 11/12/2002 |
| 6475824 | X-ray detector and method of fabricating the same An X-ray detector, which comprises a gate pad connected to a gate line disposed crosswise in a first direction, a data pad connected to a data line disposed lengthwise in a second direction substantially perpendicular to the first direction, a switching e... | 11/05/2002 |
