U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Icon_funbox Did You Know...

...that Robert Adler has the dubious distinction of being the Father of the Couch Potato? Back in 1955 Adler was employed by what was then Zenith Radio Corp., where he was charged to invent something that would allow viewers to turn down the TV volume without leaving their chairs. After a series of flops (such as a wired contraption that people tripped over), Adler hit on the idea of using sound waves. Thus the Remote Control was born...

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Examiner: Sparks, Donald


Primary examiner statistics: 1376 patents; average approval time: 1374 days
Assistant examiner statistics: 155 patents; average approval time: 662 days

Patents as Primary Examiner (view all)

Patent No. Patent Title:
7979375 Engines, methods, and systems for normalizing heterogeneous param...
7974937 Adaptive embedded historians with aggregator component
7970717 Method and apparatus for providing fast kernel learning on sparse...
7970721 Learning and reasoning from web projections
7970727 Method for modeling data structures by creating digraphs through ...
7966274 Enhanced learning and recognition operations for radial basis fun...
7966268 Method and apparatus for automated identification of signal chara...
7966277 Partition-based pattern recognition system
7966270 System and method for adaptive content processing and classificat...
7966269 Intelligent human-machine interface
7962440 Adaptive industrial systems via embedded historian data
7962437 Data comparison using different time periods in data sequences
7962431 Automatically controlling in-process software distributions throu...
7962441 Air conditioner for vehicle and controlling method thereof
7962425 Method and system for responding to an alert
7958078 Clustering triz analysis method
7958071 Computational nodes and computational-node networks that include ...
7953676 Predictive discrete latent factor models for large scale dyadic d...
7953675 Tensor voting in N dimensional spaces
7953677 Computer-implemented method, computer program and system for anal...
7953684 Method and system for optimal parallel computing performance
7953687 Knowledge discovery system with user interactive analysis view fo...
7953690 Discovering social relationships from personal photo collections
7953682 Method of driving a display using non-negative matrix factorizati...
7953683 Learning apparatus, learning method, and program for efficiently ...
7953691 Performance evaluating apparatus, performance evaluating method, ...
7949620 Method and device for detecting clusters amongst data arranged in...
7949625 Automated management of brand rules for providing content
7949626 Movement of an agent that utilizes a compiled set of canonical ru...
7941390 System for managing multi-field classification rules relating to ...
7941391 Link spam detection using smooth classification function
7937343 Method and apparatus for randomized verification of neural nets
7937341 Method for the automatic sequencing of the specifications of a co...
7937334 System and method for defining normal operating regions and ident...
7937335 Article and method for finding a compact representation to visual...
7937350 Method, system and program product for determining a time for ret...
7937339 Method and apparatus for using bayesian networks for localization
7937336 Predicting geographic location associated with network address
7937338 System and method for identifying document structure and associat...
7937353 Method and system for determining whether to alter a firewall con...

Patents as Assistant Examiner (view all)

Patent No. Patent Title:
5629840 High powered die with bus bars
5490041 Semiconductor integrated circuit module and a semiconductor integ...
5452182 Flexible high density interconnect structure and flexibly interco...
5434747 Photoelectric transducer
5434752 System and method for regulating staggered connection insertion t...
5434751 Reworkable high density interconnect structure incorporating a re...
5432680 Electronic assembly including lead terminals spaced apart in two ...
5430615 Printed circuit board assembly
5428506 Circuit board EMI suppressor including a lossy dielectric layer
5426568 Launch-protected electronic assembly
5426566 Multichip integrated circuit packages and systems
5420760 Microcomputer enclosure with interrupted wedge locking arrangemen...
5420758 Integrated circuit package using a multi-layer PCB in a plastic p...
5420756 Memory card including stacked semiconductor memory elements locat...
5418691 Two printed circuit boards superiposed on one another both having...
5414594 Self-adjusting insertion/extraction apparatus for printed circuit...
5412540 Apparatus for removably applying a flat-pack to a socket
5410450 Internal wiring structure of a semiconductor device
5408386 Socket assembly including a first circuit board located between a...
5406453 Computer chassis planar/riser card assembly
5406458 Printed circuit board having tapered contact pads for surface mou...
5404276 Screened RFI through-let
5404275 Rack structure for accommodating electronic modules
5400221 Printed circuit board mounted with electric elements thereon
5398169 Microelectronic package comprising metal housing grounded to boar...
5388030 Metal module housing having a plurality of lugs formed therein fo...
5386342 Rigid backplane formed from a moisture resistant insulative mater...
5386341 Flexible substrate folded in a U-shape with a rigidizer plate loc...
5386346 Circuit card assembly with shielding assembly for reducing EMI em...
5384689 Integrated circuit chip including superimposed upper and lower pr...
5383098 Shield assembly
5383097 Conductive path ESD shield
5381307 Self-aligning electrical contact array
5379191 Compact adapter package providing peripheral to area translation ...
5377080 Printed circuit board mounting box
5377081 Surface mountable electronic part
5375041 Ra-tab array bump tab tape based I.C. package
5373419 Lever mechanism
5371653 Circuit board, electronic circuit chip-mounted circuit board and ...
5365409 Integrated circuit package design having an intermediate die-atta...
 
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