Did You Know...
...that Thomas Edison's patent application on his phonograph was approved by the Patent Office in just seven weeks? In contrast, it took Gordon Gould, the inventor of the laser, 30 years to obtain his patent -- finally awarded in 1988!
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| Number | Title | Issue Date |
| 7463059 | Alterable application specific integrated circuit (ASIC) A semiconductor device includes a plurality of circuit blocks; and a configuration circuit coupled to the plurality of circuit blocks to program the circuit blocks, the configuration circuit comprising a plurality of memory elements, the memory elements further comp... | 12/09/2008 |
| 7463058 | Programmable array logic circuit employing non-volatile ferromagnetic memory cells A programmable array logic circuit whose temporary memory circuitry employs single bit non-volatile ferromagnetic memory cells. The ferromagnetic memory cells or bits store data even when there is no power provided to the circuitry, thus saving power during operatio... | 12/09/2008 |
| 7463054 | Data bus charge-sharing technique for integrated circuit devices A data bus charge-sharing technique for integrated circuit devices may be implemented utilizing two voltage regulators to generate constant voltages VEQ1 and VEQ2, which are in the particular exemplary implementation disclosed, approximately 0.9 times ... | 12/09/2008 |
| 7463056 | Writeable shift register lookup table in FPGA with SRAM memory cells in lookup table reprogrammed by writing after initial configuration An FPGA system includes a combined shift register and look up table (LUT) forming a shift register LUT (SRL) that provides data write, reset and shift enable on a cell-by-cell basis. The data write and reset can be performed during FPGA operation without requiring a... | 12/09/2008 |
| 7459997 | Elastic wave filter device and duplexer In an elastic wave acoustic device, input ends of first to third longitudinally coupled resonator surface acoustic wave filters are connected to an unbalanced signal terminal, the output end of the first longitudinally coupled resonator surface acoustic wave filter,... | 12/02/2008 |
| 7459995 | Noise suppression circuit A small-sized noise suppression circuit capable of suppressing noise in a wide frequency range is realized. A noise suppression circuit has first and second inductors inserted in series in a first conductive line, and a series circuit configured to have a third indu... | 12/02/2008 |
| 7459934 | Semiconductor integrated circuit A semiconductor integrated circuit able to reduce a load of layout design when arranging switches in a power lines for preventing leakage current and able to reduce the influence of a voltage drop occurring in the switches on a signal delay, wherein a plurality of g... | 12/02/2008 |
| 7459989 | Integrated phase shifter of differential signals in quadrature A distributed phase shifter including: a first planar winding having its ends defining accesses in phase opposition; a second planar winding coupled with the first one and grounded by a first capacitive element; a third planar winding in a conductive level different... | 12/02/2008 |
| 7459935 | Programmable logic devices with distributed memory A programmable logic device includes a plurality of input/output blocks providing an input/output interface for the programmable logic device and a first and second plurality of logic blocks providing programmable logic functions, with only the second plurality of l... | 12/02/2008 |
| 7459932 | Programmable logic device having logic modules with improved register capabilities A PLD that has more flip flops per logic module by providing more registered outputs than combinational outputs; and/or a combinational output that can drive more than one register is disclosed. The PLD includes a plurality of logic array blocks arranged in an array... | 12/02/2008 |
| 7456648 | Differential amplifiers using asymmetric transfer characteristics to suppress input noise in output logic signals An output amplifier is provided for use in a bidirectional communications interface, for example, connecting a transmitter and a receiver to a transmission line. The output amplifier includes a differential amplifier pair connected to output circuitry. The different... | 11/25/2008 |
| 7456659 | Semiconductor integrated circuit A semiconductor integrated circuit able to reduce a load of layout design when arranging switches in a power lines for preventing leakage current and able to reduce the influence of a voltage drop occurring in the switches on a signal delay, wherein a plurality of g... | 11/25/2008 |
| 7456652 | Apparatus for expressing circuit version identification information An apparatus for expressing circuit version identification (VID) includes multiple conductive layers, a circuit VID unit, and a first and a second pull-up or pull-down circuits. Each of the conductive layers includes a first and a second conductive line. The first p... | 11/25/2008 |
| 7456712 | Cross coupling tuning apparatus for dielectric resonator circuit The invention is an apparatus and technique for tuning the cross coupling of resonators in a dielectric resonator circuit. A cross coupling element such as a coaxial cable having a first end positioned adjacent a first resonator in the circuit and a second end posit... | 11/25/2008 |
| 7456700 | Variable loop gain oscillator system A system for comparing, measuring, or providing a reference signal based on a oscillator having variable loop gain is described. Only when the oscillator loop gain is at least the value of one does the oscillator produce an AC output signal. The oscillator's ability... | 11/25/2008 |
| 7453288 | Clock translator and parallel to serial converter A system and method for using one or more clock signals is disclosed. The system includes a clock translator that has a first input to receive a first reference clock signal and a second input to receive a second reference clock signal. The clock translator also inc... | 11/18/2008 |
| 7453285 | Dynamically configurable logic gate using a non-linear element A dynamically configurable logic gate includes an input summer for receiving a first input signal and a second input signal to generate a summed input signal. Further the dynamically configurable logic gate includes a nonlinear element that applies a nonlinear funct... | 11/18/2008 |
| 7446630 | Phase shifter circuit A full range phase shifter circuit includes a power divider, a hybrid coupler, a differential phase shifter, a power combiner and switched attenuators. The power divider, hybrid coupler, differential phase shifter and power combiner comprise lumped elements and can ... | 11/04/2008 |
| 7446560 | Programmable system on a chip for temperature monitoring and control A programmable system-on-a-chip integrated circuit device includes a programmable logic block, at least one user non-volatile memory block, and temperature sensing and control analog and digital circuits on a single semiconductor integrated circuit chip or a flip ch... | 11/04/2008 |
| 7446564 | Level shifter A level shifter is disclosed, which has an input control circuit, a high-level voltage supply and a step-down circuit. The high-level voltage supply provides a high-level voltage source. The step-down circuit is coupled between the input control circuit and the high... | 11/04/2008 |
| 7446570 | Shift register, gate driving circuit and display panel having the same, and method thereof A shift register includes a plurality of stages each generating an output signal in sequence and including a buffering section, a driving section, a first charging section, and a charging control section. The buffering section receives one of a scan start signal and... | 11/04/2008 |
| 7443202 | Semiconductor device and electronic apparatus having the same With an offset circuit including transistors of the same conductivity type, offset of an input signal is performed. Then, the input signal after the offset is supplied to a logic circuit including transistors of the same conductivity type as that of the offset circu... | 10/28/2008 |
| 7443197 | Low leakage and data retention circuitry An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is ... | 10/28/2008 |
| 7439831 | Transition circuit A transition circuit includes: a waveguide having a notched portion formed by cutting away a portion of the tube wall of the waveguide from the end portion of the waveguide; a dielectric substrate in which a portion extending outside the waveguide through the notche... | 10/21/2008 |
| 7439764 | Systems and methods for programming large-scale field-programmable analog arrays A large-scale field-programmable analog array (FPAA) for rapidly prototyping analog systems and an arbitrary analog waveform generator. The large-scale FPAA includes a floating-gate transistor array and a plurality of computational analog blocks (CABs), which may be... | 10/21/2008 |
| 7436219 | Level shifter circuit A level shifter circuit includes: K level shifter units for receiving K input signals having a first voltage level range and outputting K output signals having a second voltage level range, wherein the second voltage level range is greater than the first voltage lev... | 10/14/2008 |
| 7436217 | Methods and apparatus for serially connected devices Apparatus and methods for processing a clock input signal with a clock regeneration circuit to provide a clock output signal for coupling to a cascaded device. The clock output signal has a period substantially equal to the period of the clock input signal and a dut... | 10/14/2008 |
| 7436203 | On-chip transformer arrangement An integrated circuit requires on-chip termination resistor for minimizing reflections from input signals supplied by an external signal source. The input signal is applied across two bonding pads which serve as input terminals for the integrated circuit. The first ... | 10/14/2008 |
| 7436274 | Band-pass filter A band-pass filter (10) for reducing harmonic electromagnetic signals includes an input line (100), an output line (120), at least one first resonator (140), and at least one second resonator (160). The input line inputs electromag... | 10/14/2008 |
| 7436214 | Pseudo differential current mode receiver A pseudo differential current mode receiver includes a regulated cascode buffer for buffering a received data current to generate a buffered data current with cascode-reduced input impedance and cascode-increased output impedance. In addition, a signal converter gen... | 10/14/2008 |
| 7436210 | Next generation 8B10B architecture Eight-bit ten-bit (8B10B) coding is provided in a hard intellectual property (IP) block with the capability of supporting a greater range of data rates (e.g., data rates less than, equal to, and greater than 3.125 Gbps). Each channel of high speed serial interface c... | 10/14/2008 |
| 7436220 | Partially gated mux-latch keeper Embodiments related to multiplexer latches (mux-latches) are presented herein. ... | 10/14/2008 |
| 7436209 | Nanoscale electronic latch In one embodiment of the present invention, a nanoscale latch is implemented by interconnecting an enable line, two control lines, and a pull-down line, when needed, to a signal line carrying encoded binary values to be latched and subsequently output. The enable li... | 10/14/2008 |
| 7436201 | Architecture for reducing leakage component in semiconductor devices An architecture for reducing leakage component in semiconductor devices using a gated power supply is based on the supply being split into two parts. An alternate inverter is connected to a different power rail derived from the same single power rail. The power rail... | 10/14/2008 |
| 7436276 | Tuning circuit preventing a deterioration of Q value A tuning circuit comprises, at least, a first circuit K1 which serially connects a first variable capacitor element 21a and a second variable capacitor element 31a, an inductance element 23a which is parallely connect... | 10/14/2008 |
| 7432737 | Semiconductor device, display device, and electronic device To provide a semiconductor device which operates stably with few malfunctions due to noise, with low power consumption, and little variation in characteristics; a display device including the semiconductor device; and an electronic device including the display devic... | 10/07/2008 |
| 7432732 | Integrated circuit device including interface circuit and electronic apparatus An integrated circuit device, includes: an input pad region including a differential signal input region receiving a pair of differential signals, a first power supply input region and a second power supply input region; and an interface circuit including a receivin... | 10/07/2008 |
| 7429878 | Apparatus for controlling drive current in semiconductor integrated circuit devices A circuit device for variously controlling a current drive capacity of a semiconductor IC device as required by the user. A circuit device, capable of preventing a semiconductor IC device from failing to drive an external device, preventing an operational speed of t... | 09/30/2008 |
| 7427874 | Interface block architectures A programmable logic device in accordance with an embodiment of the invention includes configurable logic blocks, embedded random access memory (RAM) blocks, and input/output blocks adapted to transfer information into or out of the programmable logic device. An int... | 09/23/2008 |
| 7428722 | Versatile multiplexer-structures in programmable logic using serial chaining and novel selection schemes Logic design apparatus and method provides serial multiplexer chains in a programmable logic fabric, each element in the chain either selects output of block, or passes output from earlier element of the chain. Select line is a decoder structure or output from confi... | 09/23/2008 |
