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| 8166366 | Partial configuration of programmable circuitry with validation |
| 8161333 | Information processing system |
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| 8145964 | Scan test circuit and scan test control method |
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| 8140950 | Hybrid automatic repeat request system and method |
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| RE43231 | System and method for joint source-channel encoding, with symbol,... |
| 8127190 | Sampling a device bus |
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| 8122307 | One time programmable memory test structures and methods |
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| 8108739 | High-speed testing of integrated devices |
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| 8086924 | Implementing diagnosis of transitional scan chain defects using l... |
| 8082475 | Enhanced microprocessor interconnect with bit shadowing |
| 8082474 | Bit shadowing in a memory system |
| 8069385 | Programmable built-in self-test architecture |
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| 8037379 | Prediction of impact on post-repair yield resulting from manufact... |
| 8028211 | Look-ahead built-in self tests with temperature elevation of func... |
| 8015458 | Fault isolation in interconnect systems |
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| 7992063 | Control circuit for releasing residual charges |
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| 7975191 | Nonvolatile memory device comprising a programming and deletion c... |
| 7975192 | Reading memory cells using multiple thresholds |