"I watched his countenance closely, to see if he was not deranged ... and I was assured by other senators after he left the room that they had no confidence in it."
U.S. Senator Smith of Indiana ; After seeing Samuel Morse demonstrate the telegraph.
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| Number | Title | Issue Date |
| 5261100 | Method of software development A program data managing apparatus comprising memories for storing as program data a source code, technique data on a process for making the source code, and intention data on intention to make the source code; a link indicative of the mutual relationship ... | 11/09/1993 |
| 5247464 | Node location by differential time measurements A system for determining the physical location of nodes on a network. The system includes two stations each of which has a clock. Each station uses its clock to determine the arrival times at the station of a packet transmitted over the network from a fir... | 09/21/1993 |
| 5241660 | Buffered asynchronous communications element with receive/transmit control and status reporting An asynchronous communications element which incorporates user-selectable FIFOs both as transmitter and receiver buffers to reduce CPU interrupt overhead. The asynchronous communications element includes a receiver shift register which receives serial dat... | 08/31/1993 |
| 5237687 | Microprogram load unit having alternative backup memory sources A microprogram load unit comprising a readable and writable microprogram memory within a central processor unit for storing microprogram, a relatively low speed, readable and writable, nonvolatile memory unit, and a readable and writable memory with batte... | 08/17/1993 |
| 5233695 | Microprocessor with a reduced size microprogram When a data processing instruction is given to a microprocessor, and the code of a data register subject to designation is held in an instruction register, a first logic level is outputted from the instruction code decoder, but when the register subject t... | 08/03/1993 |
| 5226155 | Method and system for allocating file space in memory of IC card In a memory area of a data memory in an IC card, data file definition data for defining a data file is stored from one end of the memory area, and a data file is defined from the other end of the memory area. Area definition data for defining an area in a... | 07/06/1993 |
| 5226148 | Method and apparatus for validating character strings In a method of, and apparatus for validating character sequences, for example strings of characters generated by keyboards or keypads in telephone systems, computers, and the like, increased speed and reduced memory requirements are achieved by comparing ... | 07/06/1993 |
| 5226128 | Horizontal computer having register multiconnect for execution of a loop with a branch A horizontal computer for execution of an instruction loop with a branch. The computer includes parallel processors, a multiconnect unit for storing operands for the processors, and instruction unit for specifying address offsets and operations to be perf... | 07/06/1993 |
| 5226119 | Graphic display controller A graphic memory in which a bit of storage element is allocated to each pixel of an image to be displayed on a CRT monitor is provided. A source data transferred by a direct memory access controller is shifted by a barrel shift circuit. The resultant data... | 07/06/1993 |
| 5220439 | Facsimile apparatus having improved memory control for error-correcting and non-error-correcting modes There is disclosed a facsimile apparatus capable of communication of image information in the error correction mode and in the memory communication mode, the same memory means in common in both modes, thus economizing the memory capacity required in the a... | 06/15/1993 |
| 5220669 | Linkage mechanism for program isolation A computer system has general purpose registers, control registers and access registers for containing information to allow address space capability. A linkage stack uses protected address space to store state information during program call and program r... | 06/15/1993 |
| 5218695 | File server system having high-speed write execution A file server system selectively stores and provides access to files across a local network. The system utilizes adaptive request batching, disk pre-allocation, and shadow inode logic to enable data writing operations to be executed at high speed, while c... | 06/08/1993 |
| 5218699 | Remote procedure calls in heterogeneous systems A system for making procedure calls can be used with a network of computers. An application program on a local node calls a desired library procedure. The library procedure can be available on the local node or a remote node, and the location need not be ... | 06/08/1993 |
| 5218706 | Data flow processor with next destination node determination A data flow processor which is so constructed that the destination node number in a program memory is stored at a relative address from, for example, a stored address of the present instruction, and a storing address for the next instruction is obtained b... | 06/08/1993 |
| 5218689 | Single disk emulation interface for an array of asynchronously operating disk drives A multiple disk drive array storage device emulates the operation of a single disk drive. The array storage device includes a large buffer memory and a plurality of asynchronously-operating disk drives. A full physical track of data from each of the disk ... | 06/08/1993 |
| 5214599 | Advanced dimensional processing with division The invention comprises a multi-dimensional array having an inverted, self-pruning binary tree architecture. The array is capable of doing comparative and computational tasks in one clock cycle of computer operation. The computational results of the inven... | 05/25/1993 |
| 5214781 | Method of managing storage medium A system is provided for managing a storage medium on which management information, data and associated history information are recorded. The system packs and records history information pieces, which have been recorded on a plurality of sectors, on a sin... | 05/25/1993 |
| 5212788 | System and method for consistent timestamping in distributed computer databases A distributed database system has a plurality of databases located at distinct nodes, at least one of the databases comprising a timestamping database. Distributed transactions are committed using a two phase protocol. During the first phase, each cohort ... | 05/18/1993 |
| 5212789 | Method and apparatus for updating application databases used in a distributed transaction processing environment A method and apparatus for updating application databases in real time in a distributed transaction processing environment, such as a service control point, without adversely affecting the throughput of transaction processing or losing substantially any c... | 05/18/1993 |
| 5212785 | Apparatus and method for controlling data flow between a computer and memory devices A method and apparatus for controlling data flow between a computer and a group of memory devices arranged in a particular logical configuration. The system includes a group of first level controllers and a group of second level controllers. The first lev... | 05/18/1993 |
| 5212794 | Method for optimizing computer code to provide more efficient execution on computers having cache memories The method uses statistical information obtained by running the computer code with test data to determine a new ordering for the code blocks. The new order places code blocks that are often executed after one another close to one another in the computer's... | 05/18/1993 |
| 5212638 | Alphabetic keyboard arrangement for typing Mandarin Chinese phonetic data The invention is an alphabetic keyboard arrangement for convenient and fast typing--for instructional, research or data entry purposes--the phonetic data or phonetic transcriptions of Mandarin Chinese in the pinyin romanization. Its distinguishing feature... | 05/18/1993 |
| 5210838 | Method and apparatus for predicting the effective addresses of future memory load operations in a microprocessor A method and apparatus for loading a data value for a future LOAD instruction in a microprocessor by predicting the LOAD instruction's effective address. At each occurrence of a LOAD instruction, the effective address used is stored in a memory array whic... | 05/11/1993 |
| 5210875 | Initial BIOS load for a personal computer system An apparatus and method for loading BIOS stored on a direct access storage device into a personal computer system. The personal computer system comprises a system processor, a system planar, a random access main memory, a read only memory, and at least on... | 05/11/1993 |
| 5204951 | Apparatus and method for improving the communication efficiency between a host processor and peripheral devices connected by an SCSI bus Apparatus and method for increasing efficiency of command execution from a host processor over an SCSI bus. Arbitration, selection and message out functions of SCSI protocol are implemented using a background arbitration state machine. Additional protocol... | 04/20/1993 |
| 5204958 | System and method for efficiently indexing and storing a large database with high data insertion frequency A database index file is maintained by a computer system having primary random access memory and secondary memory. A record for each item added to the database is stored in a sequential file in secondary memory (disk storage) and an indexed pointer to the... | 04/20/1993 |
| 5202970 | Method for sharing memory in a multiprocessor system A method of memory access for sharing a memory between multiple processors. The memory comprises a plurality of sections and each section is connected to each processor by a memory path. Each section includes a plurality of subsections and each subsection... | 04/13/1993 |
| 5202982 | Method and apparatus for the naming of database component files to avoid duplication of files In the method and apparatus of the present invention a file to be added to the database is given a unique name that is dependent upon the contents of the file such that, when the contents of the source file changes, the name of the database component file... | 04/13/1993 |
| 5202996 | Software structuring system and method by data table translation System and method of designing and developing table translation software in which an operation is performed on input data provided in the form of tables, and data resulting from the operation is also provided in the form of tables. The system includes an ... | 04/13/1993 |
| 5202984 | Apparatus and method for updating transaction file A table memory is provided for selecting types of files to be updated in accordance with identification codes designating types of transactions. When a transaction occurs, the corresponding transaction record and the identification code indicating the typ... | 04/13/1993 |
| 5201047 | Attribute-based classification and retrieval system An attribute-based automated classification and retrieval system for group technology applications using a codeless classification system in which hierarchical classification structures are stored in a classification attribute file and in which searches c... | 04/06/1993 |
| 5201046 | Relational database management system and method for storing, retrieving and modifying directed graph data structures An improved database management system (DBMS) stores, retrieves and manipulates directed graph data structures in a relational database. Each directed graph data structure contains one or more records of data which are interconnected by pointers. Data is ... | 04/06/1993 |
| 5199106 | Input output interface controller connecting a synchronous bus to an asynchronous bus and methods for performing operations on the bus In a data processing system, an input output bus unit (IOBU) is connected to one end of an input output interface controller (IOIC) via an asynchronous bus. The other end of the IOIC is connected to a storage controller (SC) and an input output interface ... | 03/30/1993 |
| 5193204 | Processor interface circuitry for effecting data transfers between processors Apparatus for enabling a first processor to cause a second processor to effect a transfer of data between the processors in accordance with data transfer commands sent from the first processor to the second processor is described. The processors each have... | 03/09/1993 |
| 5193190 | Partitioning optimizations in an optimizing compiler A computer program to be compiled is optimized prior to carrying out the final compilation. Subgraphs within the program are identified and examined for optimization beginning with the entire program as the largest subgraph. The number of entities in each... | 03/09/1993 |
| 5193158 | Method and apparatus for exception handling in pipeline processors having mismatched instruction pipeline depths Method and apparatus for sequentially executing a plurality of pipelined instruction words of a program in which each instruction has independently selectable execution cycle count latencies. After the occurrence of an exception, instructions are identifi... | 03/09/1993 |
| 5189733 | Application program memory management system A computer system for executing application programs with limited available main memory capacity includes a main memory management system. The architecture of the stub vectors of a swappable code object and the protocol for referencing the stubs in active... | 02/23/1993 |
| 5187790 | Server impersonation of client processes in an object based computer operating system In a multitasking, multiuser computer system, a server process temporarily impersonates the characteristics of a client process when the client process preforms a remote procedure call on the server process. Each process has an identifier list with a plur... | 02/16/1993 |
| 5187788 | Graphics system for automatic computer code generation The Avionics Program Expert (APEX) is an automatic code generation tool for the Ada programming language (MIL-STD 1815A). It provides the programmer using APEX with the ability to quickly create a graphical representation of his initial program design. Th... | 02/16/1993 |
| 5185877 | Protocol for transfer of DMA data A process for transferring data via DMA between a system resource and a controller via switching logic. During a setup write transaction, the switching logic is set up to enable DMA data to be transferred between a particular system memory and a selected ... | 02/09/1993 |