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| Number | Title | Issue Date |
| 5622873 | Process for manufacturing a resin molded image pick-up semiconductor chip having a window A process for packaging a solid type image pick-up device and a device produced by the packaging process. The process includes the steps of: forming a protecting layer on a light receiving region of an image pick-up chip formed on a semiconductor wafer; s... | 04/22/1997 |
| 5622897 | Process of manufacturing a drop-on-demand ink jet printhead having thermoelectric temperature control means A process for manufacturing a drop-on-demand ink jet printhead having thermoelectric temperature control apparatus incorporated therewith for the selective heating or cooling thereof and a method of manufacturing the same. The ink jet printhead includes a... | 04/22/1997 |
| 5614441 | Process of folding a strip leadframe to superpose two leadframes in a plural semiconductor die encapsulated package A method of manufacturing a semiconductor device wherein, a first lead frame portion has a bed portion for mounting a semiconductor element and a plurality of inner and outer leads. A second lead frame portion has a bed portion for mounting a semiconducto... | 03/25/1997 |
| 5605863 | Device packaging using heat spreaders and assisted deposition of wire bonds A process for manufacturing device or die is presented which uses laser deposited leads, with a filler to bridge the gap between the die and the lead frame. The filler may be oxide, poly amide, a combination of oxide layers and poly amide layers, plastic ... | 02/25/1997 |
| 5593465 | Mounting for carrier bodies in an apparatus for the deposition of semiconductor material Mounting for carrier bodies in an apparatus for the deposition of semiconductor material on heated carrier bodies, having a fixed current leadthrough passed through the base plate of the deposition apparatus, an electrode holder, and a graphite electrode.... | 01/14/1997 |
| 5591678 | Process of manufacturing a microelectric device using a removable support substrate and etch-stop A microelectronic device is fabricated by furnishing a first substrate (40) having a silicon etchable layer (42), a silicon dioxide etch-stop layer (44) overlying the silicon layer (42), and a single-crystal silicon wafer (46) overlying the etch-stop laye... | 01/07/1997 |
| 5591649 | Process of removing a tape automated bonded semiconductor from bonded leads A removable tab process whereby tabs (7) are affixed to the pads (3) by initially having the bonding surface as flat as possible so that bonding pressures from pad to pad are relatively uniform. Bonding is performed with the pressure applied to the pads b... | 01/07/1997 |
| 5589402 | Process for manufacturing a package for mating with a bare semiconductor die A method for interconnecting electrical system components. A leadframe (10) having leads (11) is encapsulated within a molding compound to form a first section (36) of the interconnect package (35). The first section (36) optionally includes channels (54)... | 12/31/1996 |
| 5587341 | Process for manufacturing a stacked integrated circuit package In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of hig... | 12/24/1996 |
| 5585282 | Process for forming a raised portion on a projecting contact for electrical testing of a semiconductor A process for forming die contacting substrate for establishing ohmic contact with the die is formed with raised portions on contact members. The raised portions are dimensioned so that a compression force applied to the die against the substrate results ... | 12/17/1996 |
| 5585281 | Process and apparatus for forming and testing semiconductor package leads A method of forming leads and providing a final test of a semiconductor package including an electronic circuit therein, the package having unformed leads. A forming and testing station is provided including a support for receiving the package, and dies m... | 12/17/1996 |
| 5578532 | Wafer surface protection in a gas deposition process A process comprising a platen having a substrate contact supporting a substrate during the deposition of tungsten, metal nitrides, other metals, and silicides in a chemical vapor deposition reactor. A deposition control gas composed of a suitable inert ga... | 11/26/1996 |
| 5569625 | Process for manufacturing a plural stacked leadframe semiconductor device A semiconductor process includes a stage, a semiconductor chip which is mounted on the stage, a plurality of electrode members which are wire bonded to the semiconductor chip, where a first gap is formed between the stage and one electrode member and a se... | 10/29/1996 |
| 5567653 | Process for aligning etch masks on an integrated circuit surface using electromagnetic energy Methods for alignment of stacked integrated circuit chips and the resultant three-dimensional semiconductor structures. A thickness control layer is deposited, as needed, on each integrated circuit chip. The thickness of the layer is determined by the thi... | 10/22/1996 |
| 5567648 | Process for providing interconnect bumps on a bonding pad by application of a sheet of conductive discs A method for forming conductive interconnect bumps, such as solder bumps, on bond pads on a substrate. The method includes conductive discs and a connecting member formed between two adjacent conductive discs. The discs and connecting member are then plac... | 10/22/1996 |
| 5565378 | Process of passivating a semiconductor device bonding pad by immersion in O2 or O3 solution A passive state film is formed on a surface of a bonding pad as follows: A silicon substrate 71 is immersed in solution continuously supplied with ozone. Since ozone is continuously supplied, it is possible to maintain the concentration of the dissolved o... | 10/15/1996 |
| 5565008 | Process of raising a semiconductor device out of a pallet using a positioning rod A method of manufacturing semiconductor devices includes accommodating the semiconductor devices in the form of semimanufactures in accomodating tools having uniform outer dimensions regardless of the type of the semiconductor devices; receiving the semic... | 10/15/1996 |
| 5563103 | Method for manufacturing thermoplastic resin molded semiconductor A semiconductor assembly is sandwiched by two metal molds so that the semiconductor assembly is located within a cavity formed between the metal molds. Thermoplastic resin is injected through an injection stream passage provided in one of the metal molds ... | 10/08/1996 |
| 5563076 | Process for adjusting heights of plural semiconductor devices on a circuit board The heights of intermediate terminal boards are adjusted to compensate for differences in heights of semiconductor elements on a bottom terminal board. The adjustment places the tops of all intermediate terminal boards in a common plane. A top terminal bo... | 10/08/1996 |
| 5559051 | Process for manufacturing a silicon chip with an integrated magnetoresistive head mounted on a slider A process of making an MR head having its MR stripe protected from electro-static discharge (ESD) on a slider, such as titanium carbide. The MR stripe is protected by a plurality of silicon integrated circuit devices which conduct ESD-induced current from... | 09/24/1996 |
| 5549716 | Process for manufacturing integrated circuits using an automated multi-station apparatus including an adhesive dispenser and apparatus therefor A process for manufacturing an electronic component and an apparatus therefor capable of permitting die-bonding, wire-bonding and molding to be successively executed on a through-line. Die-bonding for adhesively mounting IC chips on a lead frame, wire-bon... | 08/27/1996 |
| 5550087 | Process for bonding a semiconductor die to a variable die size inner lead layout A process for manufacturing substrate including a non-conductive support layer and a plurality "n" of conductive leads disposed on the support layer. The leads are arranged in a generally radial pattern about a central point on the support layer, each of ... | 08/27/1996 |
| 5550083 | Process of wirebond pad repair and reuse A wire bonding method comprising the steps of (a) disconnecting a first wire which is bonded on a first pad which is provided on a substrate, (b) forming a second pad on the first pad, and (c) bonding a second wire on the second pad, so that the second wi... | 08/27/1996 |
| 5543363 | Process for adhesively attaching a semiconductor device to an electrode plate In a semiconductor device, a semiconductor element is stored in a casing while being held by external electrodes through first and second electrodes. The outer peripheral edge of the first electrode plate is projected outwardly beyond that of the semicond... | 08/06/1996 |
| 5539550 | Liquid crystal display having adhered circuit tiles Circuit modules including complex multi-function circuitry on common module substrates using circuit tiles of silicon thin-films which are transferred, interconnected and packaged. The modules include integrated transfer/interconnects with extremely high ... | 07/23/1996 |
| 5536677 | Method of forming conductive bumps on a semiconductor device using a double mask structure A method for forming conductive bumps (60, 62) on a semiconductor device (50) using a mask structure (20) employs two masks (22, 24) individually fabricated and positioned in a back-to-back relationship. Each mask is patterned and isotropically etched to ... | 07/16/1996 |
| 5533243 | Notch position aligning apparatus and process for using the apparatus to independently align individual wafers in a wafer cassette According to this invention, there is provided a notch position aligning mechanism and a process for using the mechanism including a base which can be vertically movably inserted into a cassette through a lower opening of the cassette for storing a plural... | 07/09/1996 |
| 5534442 | Process of providing uniform photoresist thickness on an opto-electronic device A process for use in manufacturing opto-electronic components in opto-electronic hybrid module form. V-grooves (42) are provided by anisotropic etching techniques in a silicon substrate (41). Electrical ground planes (43) and interconnects (46, 49) are pr... | 07/09/1996 |
| 5532186 | Process for manufacturing bumped tab tape A manufacturing method for a TAB tape which forms a plurality of bumps on a plurality of sheet-like leads of the TAB tape. First, the leads are fixed to a belt-shaped tape member having a plurality of first openings arranged at equal intervals in a longit... | 07/02/1996 |
| 5532187 | Process for sealing apertures in glass-silicon-glass micromechanical acceleration sensors A method for sealing apertures caused by manufacturing processes in micromechanical acceleration sensors is disclosed whereby apertures or recesses, serving for leading the conductor paths out of the oscillation space of an acceleration sensor without cau... | 07/02/1996 |
| 5529950 | Method for manufacturing a cubically integrated circuit arrangement A method used in manufacturing a cubically integrated circuit arrangement. A silicon wafer, wherein through pores are produced by electrochemical etching are insulated from the silicon wafer, and are provided with conductive fills, is secured as a carrier... | 06/25/1996 |
| 5529957 | Method for blocking contamination and stabilizing chip capacitor during attachment using a tape strip Chip capacitors are attached to an integrated circuit package. Strips of synthetic tape are placed between pairs of chip capacitor pads on the integrated circuit package. The strips of synthetic tape each have a height extending above height of the pairs ... | 06/25/1996 |
| 5525548 | Process of fixing a heat sink to a semiconductor chip and package cap A process of manufacturing a semiconductor chip module by mounting a semiconductor chip on a substrate and contacting the chip with a heat sink. A cap is adhered to the substrate and an adhesive material is embedded in a gap between the heat sink and the ... | 06/11/1996 |
| 5521122 | Process of manufacturing a multichip module using a temporary support base A multichip-module fabrication method includes the step of forming a chip-mounting substrate by forming a bonding layer on a supporting base and by forming one or a plurality of interconnection layers in a stack formation on the bonding layer via insulati... | 05/28/1996 |
| 5518957 | Method for making a thin profile semiconductor package A process for manufacturing a thin profile semiconductor package by means of TAB (tape automated bonding). A barrier metal layer is formed on bonding pads formed on portions of a chip covered with insulating layers. A photoresist layer is formed on the re... | 05/21/1996 |
| 5510273 | Process of mounting semiconductor chips in a full-width-array image A process for manufacturing semiconductor chips, such as photosensor arrays for a full-page-width scanner or printhead chips for a full-page-width ink-jet printer, mounted on a substrate to maintain reasonably consistent spacing among adjacent chips. Befo... | 04/23/1996 |
| 5504035 | Process for solder ball interconnecting a semiconductor device to a substrate using a noble metal foil embedded interposer substrate A process of interconnecting a semiconductor device to a substrate wherein solder balls on the semiconductor device are fused with one side of an embedded noble metal foil within a through hole in an interposer structure. Solder balls on the substrate are... | 04/02/1996 |
| 5502002 | Polyimide passivation of GaAs microwave monolithic integrated circuit flip-chip A process is provided for passivating surfaces (12') of III-V microwave monolithic integrated circuit (MMIC) flip chips (40). Essentially, two cured, patterned polyimide layers (10, 28) are applied, one on the chip surface supporting a gold-plated bridge ... | 03/26/1996 |
| 5498767 | Method for positioning bond pads in a semiconductor die layout A process for positioning bond pads around a semiconductor die periphery on an octant basis, taking into account both manufacturing and design limitations. The process positions bond pad centers such that the spacing (pitch) increases towards the die corn... | 03/12/1996 |
| 5492866 | Process for correcting warped surface of plastic encapsulated semiconductor device A process for correcting the warped surface of a plastic encapsulated semiconductor lead frame device. The semiconductor device is placed on a transporting plate and transported to a heating device. The semiconductor device and the transporting device are... | 02/20/1996 |
