| Patent No. | Patent Title: |
| 8190665 | Random cache line refill |
| 8180815 | Redundancy-free circuits for zero counters |
| 8180822 | Method and system for processing the booth encoding 33term |
| 8180820 | Generation of a remainder from division of a first polynomial by ... |
| 8176106 | On-chip estimation of key-extraction parameters for physical toke... |
| 8176110 | Modular multiplier |
| 8166089 | Sampled data averaging circuit |
| 8166085 | Reducing the latency of sum-addressed shifters |
| 8161092 | Method and apparatus for efficient matrix multiplication in a dir... |
| 8156170 | Increased precision in the computation of a reciprocal square roo... |
| 8156171 | Digital logic circuit |
| 8156167 | Analog pseudo random bit sequence generator |
| 8156169 | Signal processing method and signal processing circuit |
| 8145692 | Digital generation of an accelerated or decelerated chaotic numer... |
| 8145697 | System and method for efficient basis conversion |
| 8135767 | Standard cell for arithmetic logic unit and chip card controller |
| 8131788 | Determining sum of absolute differences in parallel |
| 8131790 | Decimation filter |
| 8131794 | RAID system and Galois field product computation method |
| 8126953 | Multi-port mixed-radix FFT |
| 8122074 | Digital electronic binary rotator and reverser |
| 8122078 | Processor with enhanced combined-arithmetic capability |
| 8117249 | Equalizer systems and methods utilizing analog delay elements |
| 8112468 | Method and apparatus for performing an operation with a plurality... |
| 8112466 | Field programmable gate array |
| 8108453 | System and method for filter response switching |
| 8099449 | Method of and circuit for generating a random number using a mult... |
| 8099447 | Negative two's complement processor for windowing in harmonic ana... |
| 8099451 | Systems and methods for implementing logic in a processor |
| 8095583 | Chaotic and fractal field line calculations using decomposition a... |
| 8090756 | Method and apparatus for generating trigonometric results |
| 8069195 | Method and system for a wiring-efficient permute unit |
| 8069196 | Method and device for creating a starting value for a pseudorando... |
| 8060547 | Pade approximation convert circuit of direct digital frequency sy... |
| 8046397 | Computations of power functions using polynomial approximations |
| 8046396 | Residual Fourier-padding interpolation for instrumentation and me... |
| 8041758 | Multiplier and arithmetic unit |
| 8032574 | Probability generating apparatus |
| 8024394 | Dual mode floating point multiply accumulate unit |
| 8024385 | Programmable calculator having guided calculation mode |
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