| Patent No. | Patent Title: |
| 7987402 | Semiconductor memory device having burn-in test mode and method f... |
| 7966530 | Methods, devices, and systems for experiencing reduced unequal te... |
| 7962814 | Mode selection based on special sequence of state machine states |
| 7958420 | Clock delay circuits and multiplexer connected to boundary scan c... |
| 7949908 | Memory repair system and method |
| 7917819 | JTAG test architecture for multi-chip pack |
| 7904766 | Statistical yield of a system-on-a-chip |
| 7900104 | Test pattern compression for an integrated circuit test environme... |
| 7900109 | BDX data in stable states |
| 7877654 | Selectable JTAG or trace access with data store and output |
| 7870455 | System-on-chip with master/slave debug interface |
| 7853845 | Circuit and method for integrated circuit configuration |
| 7853843 | Method and system for testing chips |
| 7818637 | Apparatus for formatting information storage medium |
| 7818634 | Detecting method and system for consistency of link scrambling co... |
| 7797593 | Method and apparatus for memory AC timing measurement |
| 7793185 | Integrated circuit for a data transmission system and receiving d... |
| 7788548 | Method for performing a defective-area management in an optical m... |
| 7788550 | Redundant bit patterns for column defects coding |
| 7783946 | Scan based computation of a signature concurrently with functiona... |
| 7779317 | Test control circuit and reference voltage generating circuit hav... |
| 7779322 | Compacting test responses using X-driven compactor |
| 7779318 | Self test structure for interconnect and logic element testing in... |
| 7774666 | Analyzer |
| 7774670 | Method and apparatus for dynamically determining tester recipes |
| 7774662 | Method and structure for picosecond-imaging-circuit-analysis base... |
| 7770084 | Selectable JTAG or trace access with data store and output |
| 7761762 | Adapter implemented background data transfers while tap in non-sc... |
| 7761755 | Circuit for and method of testing for faults in a programmable lo... |
| 7761751 | Test and diagnosis of semiconductors |
| 7747935 | Method and device for securing the reading of a memory |
| 7747913 | Correcting intermittent errors in data storage structures |
| 7739570 | System and method for increasing error checking performance by ca... |
| 7739568 | Scan testing system for circuits under test |
| 7739582 | Error correction method for high density disc |
| 7725785 | Film-type semiconductor package and method using test pads shared... |
| 7721176 | Method, system, and computer program product for integrated circu... |
| 7716541 | Test apparatus and electronic device for generating test signal t... |
| 7716542 | Programmable memory built-in self-test circuit and clock switchin... |
| 7716546 | System and method for improved LBIST power and run time |
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