Penn Jillette of Penn and Teller fame has patented a "Hydro-Therapeutic Stimulator", which uses a hot tub for stimulation.
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| Number | Title | Issue Date |
| 8191073 | Method and system for polling network controllers Improving the performance of multitasking processors are provided. For example, a subset of M processors within a Symmetric Multi-Processing System (SMP) with N processors is dedicated for a specific task. The M (M>0) of the N processors are dedicate to a task, thus... | 05/29/2012 |
| 8151274 | Task management system A task management system for executing a task selected from tasks structuring a task combination, includes a judging unit for judging whether there is a task combination switchover request or not, a switchover unit for switching over the task combination after compl... | 04/03/2012 |
| 8127302 | Method for dynamically adjusting audio decoding process A method for dynamically arranging DSP tasks. The method comprises receiving an audio bit stream, checking a remaining execution time as the DSP transforms the audio information into spectral information, simplifying the step of transforming the audio information wh... | 02/28/2012 |
| 8117621 | Simulating a multi-queue scheduler using a single queue on a processor A method and system for scheduling tasks on a processor, the tasks being scheduled by an operating system to run on the processor in a predetermined order, the method comprising identifying and creating task groups of all related tasks; assigning the tasks in the ta... | 02/14/2012 |
| 8046770 | Methods, systems, and computer program products for managing productivity Exemplary embodiments relate to methods, systems, and computer program products for managing productivity. Methods include establishing a planned execution time for performing a task. The task is assigned a unique identifier. Methods further include comparing the pl... | 10/25/2011 |
| 8042116 | Task switching based on the execution control information held in register groups In a processor including a plurality of register groups, while a task is being executed using one of the register groups, a context of a task to be executed next is restored into another one of the register groups. If the execution of the task currently being execut... | 10/18/2011 |
| 8024741 | Dynamic latch request scaling back function to conditionally place task in suspended state A computer system dynamically scales back latch requests for system resources. Tasks seeking access to system resources each dynamically determine the probability that the task will gain access to the latch relating to a given system resource. Where the task estimat... | 09/20/2011 |
| 8020168 | Dynamic virtual software pipelining on a network on chip A NOC for dynamic virtual software pipelining including IP blocks, routers, memory communications controllers, and network interface controllers, each IP block adapted to a router through a memory communications controller and a network interface controller, the NOC... | 09/13/2011 |
| 7958512 | Instrumentation to find the thread or process responsible for an application failure An application programming interface (API) that leverages operating system instrumentation to provide a chain of threads and processes may alleviate some debugging complications. Specifically, the chain may start with the first thread in the process that experienced... | 06/07/2011 |
| 7950016 | Apparatus for switching the task to be completed in a processor by switching to the task assigned time slot A method of assigning task management blocks for first type tasks to time slot information on a one-by-one basis, assigning a plurality of task management blocks for second type tasks to time slot information, selecting a task management block according to a priorit... | 05/24/2011 |
| 7945914 | Methods and systems for performing operations in response to detecting a computer idle condition Embodiments of the invention enable the efficient use of shared resources by different processes, such as background and foreground processes sharing a mass storage device. Thus, disk intensive operations, such as file indexing, do not unduly interfere with higher p... | 05/17/2011 |
| 7926062 | Interrupt and exception handling for multi-streaming digital processors A multi-streaming processor has a plurality of streams for streaming one or more instruction threads, a set of functional resources for processing instructions from streams, and interrupt handler logic. The logic detects and maps interrupts and exceptions to one or ... | 04/12/2011 |
| 7921425 | Techniques for allocating computing resources to applications in an embedded system Techniques for allocating computing resources to tasks include receiving first data and second data. The first data indicates a limit for unblocked execution by a processor of a set of at least one task that includes instructions for the processor. The second data i... | 04/05/2011 |
| 7900207 | Interrupt and exception handling for multi-streaming digital processors A multi-streaming processor has a plurality of streams for streaming one or more instruction threads, a set of functional resources for processing instructions from streams, and interrupt handler logic. The logic detects and maps interrupts and exceptions to one or ... | 03/01/2011 |
| 7886303 | Method for dynamically adjusting audio decoding process A method for dynamically arranging DSP tasks. The method comprises receiving an audio bit stream, checking a remaining execution time as the DSP transforms the audio information into spectral information, simplifying the step of transforming the audio information wh... | 02/08/2011 |
| 7827560 | System and method for time controlled program execution A system and method is disclosed for automated task/program management which is not dependent upon a calendar based schedule and flexibly accounts for various operating conditions. In one embodiment, the disclosed system and method permits specification of one or mo... | 11/02/2010 |
| 7805727 | Execution control for processor tasks Method, system and means are provided for simultaneous activation/deactivation of a set of tasks by a processor, each of the tasks normally executed in a sequential fashion by one or more processors. A list of tasks to be activated/deactivated is stored, including t... | 09/28/2010 |
| 7797706 | Method and apparatus for thread-safe handlers for checkpoints and restarts A method, apparatus, and computer instructions for executing a handler in a multi-threaded process handling a number of threads in a manner that avoids deadlocks. A value equal to the number of threads executing in the data processing system is set. The value is dec... | 09/14/2010 |
| 7788673 | Method and system for generating a static partition scheduling timeline with reduced context switching overhead A static partition scheduling timeline is generated by identifying a plurality of partitions for scheduling, the partitions associated with a operating system that executes on a processing unit. A first plurality of Activation Frames for a first partition of said pl... | 08/31/2010 |
| 7774787 | Method for specifying and verifying multi-threaded object-oriented programs with invariants Various new and non-obvious systems and methods for ensuring within a multi-threaded environment that object fields hold legal values are disclosed. One of the disclosed embodiments is a method for a thread locking the top object of an object hierarchy. The thread t... | 08/10/2010 |
| 7765553 | Method and system for regulating background tasks using performance measurements A method and system for regulating tasks of background processes so as to reduce interference with foreground processes. The progress rate of a background task (e.g., amount of work performed per unit time) is measured and evaluated against a target amount. If the p... | 07/27/2010 |
| 7735087 | Task switching apparatus, method and program A method of assigning task management blocks for first type tasks to time slot information on a one-by-one basis, assigning a plurality of task management blocks for second type tasks to time slot information, selecting a task management block according to a priorit... | 06/08/2010 |
| 7716672 | Method and system for regulating background tasks using performance measurements A method and system for regulating tasks of background processes so as to reduce interference with foreground processes. The progress rate of a background task (e.g., amount of work performed per unit time) is measured and evaluated against a target amount. If the p... | 05/11/2010 |
| 7712104 | Multi OS configuration method and computer system A computer system of a multi-operation-system (multi-OS) has a main memory having a memory area for a first OS and a memory area for a second OS, both the areas being independent from each other, and a plurality of I/O devices divisionally allocated to the first OS ... | 05/04/2010 |
| 7698711 | Multi-tasking apparatus and method in portable terminal An apparatus and method capable of performing multiple tasks in a portable terminal are provided, in which menu functions of the portable terminal can be implemented while continuing to play the music. The multi-tasking apparatus includes a controller for performing... | 04/13/2010 |
| 7657895 | Real time-capable control system having an sps application under a non-real time-capable operating system The invention relates to a real time-capable control system essentially consisting of a software-implemented SPS application that exchanges the output data and input data by means of a field bus connecting module. The SPS application runs on a computer under the con... | 02/02/2010 |
| 7653910 | Apparatus for thread-safe handlers for checkpoints and restarts A method, apparatus, and computer instructions for executing a handler in a multi-threaded process handling a number of threads in a manner that avoids deadlocks. A value equal to the number of threads executing in the data processing system is set. The value is dec... | 01/26/2010 |
| 7653909 | Time slicing in a shared partition An operating system in a shared processor logical partitioned data processing system is given a target percentage. The hypervisor assigns the target processor percentage to the operating system. The operating system also has a predetermined time slice to allot to th... | 01/26/2010 |
| 7565658 | Hidden job start preparation in an instruction-parallel processor system The read latency caused by job start preparation of a future job is at least partly hidden within the current job by reading information for job start preparation of the future job integrated with the execution of the current job. Instructions for job start preparat... | 07/21/2009 |
| 7552439 | System and method to allow non-deterministic execution in a process control system A method includes receiving at least one process control value from a deterministic process control environment according to an execution cycle of the deterministic process control environment. The method also includes providing the at least one process control valu... | 06/23/2009 |
| 7512951 | Method and apparatus for time-sliced and multi-threaded data processing in a communication system A method for designing a time-sliced and multi-threaded architecture comprises the steps of conducting a thorough analysis of a range of applications and building a specific processor to accommodate the range of applications. In one embodiment, the thorough analysis... | 03/31/2009 |
| 7467385 | Interrupt and exception handling for multi-streaming digital processors A multi-streaming processor has a plurality of streams for streaming one or more instruction threads, a set of functional resources for processing instructions from streams, and interrupt handler logic. The logic detects and maps interrupts and exceptions to one or ... | 12/16/2008 |
| 7444641 | Context controller having context-specific event selection mechanism and processor employing the same A context controller for managing multitasking in a processor and a method of operating the same. In one embodiment, the context controller includes: (1) an event recorder that records occurrences of predetermined events and (2) an event acknowledger, associated wit... | 10/28/2008 |
| 7441245 | Phasing for a multi-threaded network processor A method of and apparatus for associating units of data with threads of a multi-threaded processor for processing, and enabling each thread to perform processing for at least two of the data units during a thread execution period. The thread execution period is divi... | 10/21/2008 |
| 7434222 | Task context switching RTOS A task switch from a first data processing task to a second data processing task can be accomplished by the first task calling a function which saves the first task's context, restores the second task's context and then returns. Because the second task's context has... | 10/07/2008 |
| 7434221 | Multi-threaded sequenced receive for fast network port stream of packets A method of processing network data in a network processor includes using three or more threads to process a beginning portion, a middle portion, and an end portion of data packet is presented. The first thread processes the beginning portion; one or more middle thr... | 10/07/2008 |
| 7434000 | Handling duplicate cache misses in a multithreaded/multi-core processor In one embodiment, a processor comprises a cache and a cache miss unit coupled to the cache. The cache miss unit is configured to initiate a cache fill of a cache line for the cache responsive to a first cache miss in the cache, wherein the first cache miss correspo... | 10/07/2008 |
| 7430627 | Adaptive reader-writer lock A method and computer system for dynamically selecting an optimal synchronization mechanism for a data structure in a multiprocessor environment. The method determines a quantity of read-side and write-side acquisitions, and evaluates the data to determine an optima... | 09/30/2008 |
| 7426154 | Sensor adjusting circuit A sensor adjusting circuit for adjusting a digital sensor, whose circuit scale is small and which can maintain high accuracy in a wide adjustment range is provided. A sensor adjusting circuit for adjusting an analog input signal inputted from a sensor and outputting... | 09/16/2008 |
| 7424589 | Method and an apparatus for the high-precision tracking of approximate per-task memory usage One embodiment of the present invention provides a method and a system for tracking memory usage of tasks in a shared heap. The system performs a full garbage-collection operation on the shared heap, during which a base memory usage is determined for each task. The ... | 09/09/2008 |