Mountable Printable Placard With Headband
A resilient headband in a shape for being mounted on the head of the user. The headband is equipped with a longitudinal slotted member for holding a placard.
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| Number | Title | Issue Date |
| 8117606 | System and method for application migration in a grid computing environment A system and method for assessing performance of a software application migrated to a grid infrastructure is provided. The system comprises a grid code analyzer for generating a directed acyclic graph (DAG) corresponding to the software application by performing sta... | 02/14/2012 |
| 8108850 | Power-aware compiling method The present invention discloses a power-aware compiling method, wherein the power model of an application program are established via building and analyzing the control flow chart and the data flow chart of the application program; each functional unit of the applic... | 01/31/2012 |
| 8074211 | Computer program, multiprocessor system, and grouping method According to one embodiment, a grouping method for process units, each including basic modules and data, the process units being assigned to processors in a program for a multiprocessor system, the program including the basic modules and a parallel statement describ... | 12/06/2011 |
| 8056066 | Method and apparatus for address taken refinement using control flow information A computer implemented method, apparatus, and computer program product for obtaining aliasing information for a target variable in a computer program. A control flow graph representing the computer program is partitioned into an taken address portion that includes a... | 11/08/2011 |
| 8046751 | Structuring unstructured regions in a control flow graph A control flow graph may be generated from a model. The control flow graph may be restructured by converting at least one unstructured region of a control flow graph into a structured region. The restructuring may include locating at least one block between two merg... | 10/25/2011 |
| 7941794 | Data flow graph processing method and processing apparatus provided with reconfigurable circuit A data flow graph processing method divides a program describing target operations into two or more subprograms and converts each of the two or more subprograms into a data flow graph (DFG) representing dependency in execution between operations carried out in seque... | 05/10/2011 |
| 7810085 | Removal of unnecessary read-to-update upgrades in software transactional memory A software transactional memory system is described which utilizes decomposed software transactional memory instructions as well as runtime optimizations to achieve efficient performance. The decomposed instructions allow a compiler with knowledge of the instruction... | 10/05/2010 |
| 7774769 | Transmitting trace-specific information in a transformed application In one embodiment, the present invention includes a method for partitioning a program segment into at least a first stage and a second stage, determining a live set of variables and control flow information alive at a boundary between the first and second stages, an... | 08/10/2010 |
| 7743370 | System and methods for determination of independence of sub-graphs in a graph-based intermediate representation of program instructions An intermediate representation of sequences of instructions for a stacked based computer is a code graph using a numbering method on the nodes of the graph, along with a set of relations among the nodes, to determine, in a single pass, the independence of each node ... | 06/22/2010 |
| 7707567 | Information processing method, information-processing apparatus, recording medium, and program An information-processing method usable by an information-processing apparatus is provided. The information-processing-apparatus is used for editing state-transition information usable to construct a state-transition diagram including information on the operation in... | 04/27/2010 |
| 7673295 | System and method for compile-time non-concurrency analysis Compile-time non-concurrency analysis of parallel programs improves execution efficiency by detecting possible data race conditions within program barriers. Subroutines are modeled with control flow graphs and region trees having plural nodes related by edges that r... | 03/02/2010 |
| 7661099 | Using idempotent operations to improve transaction performance A method for optimizing a transaction consisting of an initial sequence of computer operations, the method including identifying one or more idempotent operations in the initial sequence. The method further includes reordering the initial sequence to form a reordere... | 02/09/2010 |
| 7657882 | Wavescalar architecture having a wave order memory A dataflow instruction set architecture and execution model, referred to as WaveScalar, which is designed for scalable, low-complexity/high-performance processors, while efficiently providing traditional memory semantics through a mechanism called wave-ordered memor... | 02/02/2010 |
| 7631304 | Software tool with modeling of asynchronous program flow A compiler that forms an intermediate representation of a program using a flow graph with less than all possible edges used to model asynchronous transfers within the program. The flow graph is formed in multiple phases. In one phase, the flow graph is formed withou... | 12/08/2009 |
| 7469404 | Bank assignment for partitioned register banks Operands may be assigned to physical registers within partitioned register banks by identifying possible candidate register banks for an operand. Prior to allocation of the operand to a candidate register bank, conflicts between candidate register banks, if any, may... | 12/23/2008 |
| 7409679 | System and method for computer-aided graph-based dependency analysis The present invention is directed to a system and methods for analyzing dependencies. The dependencies that may be analyzed include, for example, dependencies among methods or procedures in software source code, or in system configuration or deployment. A layered sy... | 08/05/2008 |
| 7401329 | Compiling computer programs to exploit parallelism without exceeding available processing resources A compilation technique for computer programs forms a data flow graph of vertices which are analysed to form clusters C for parallel execution where those clusters are added to up to the point at which arbitrary selection between further vertices C, D to be added mu... | 07/15/2008 |
| 7392514 | Data flow chasing Existing systems use interprocedural data flow to analyze the source code of an entire program thereby requiring significant resources. Instead forward and backward chase components reference data structures (e.g., state machines) that identify instructions within a... | 06/24/2008 |
| 7392516 | Method and system for configuring a dependency graph for dynamic by-pass instruction scheduling There is disclosed a method and system for configuring a data dependency graph (DDG) to handle instruction scheduling in computer architectures permitting dynamic by-pass execution, and for performing dynamic by-pass scheduling utilizing such a configured DDG. In ac... | 06/24/2008 |
| 7386861 | System and method for efficiently blocking event signals associated with an operating system A blocking system intercepts communications between a software program and an operating system in order to handle blocking and unblocking of event signals. The blocking system intercepts system calls to the operating system requesting the blocking and unblocking of ... | 06/10/2008 |
| 7379858 | Computation of all-pairs reaching probabilities in software systems A Markov chain model of a software system may be used to compute all-pairs reaching probabilities to provide guidance in performing speculative operations with respect to the software system. ... | 05/27/2008 |
| 7373632 | System and method for dynamic generation of proxies for isomorphic interfaces System and method for proxying isomorphic interfaces in different subsystems. Embodiments may provide a proxy mechanism that may generate proxies for isomorphic interfaces at runtime. Embodiments may allow two mutually indifferent subsystems to communicate with each... | 05/13/2008 |
| 7370325 | Eager evaluation of tasks in a workflow system An object-focused workflow system for processing a received object in accordance with a declarative workflow specification. The specification includes modules and attributes, where module execution results in the evaluation of attributes, and may include the initiat... | 05/06/2008 |
| 7367011 | Method, system and program product for developing a data model in a data mining system A database table of predefined data transformations is provided. Each predefined data transformation is associated in the table with a unique identifier, a corresponding description and a validity period. When a data modeler wishes to develop a data model for a desi... | 04/29/2008 |
| 7367026 | Framework for integrated intra- and inter-loop aggregation of contiguous memory accesses for SIMD vectorization A method, computer program product, and information handling system for generating loop code to execute on Single-Instruction Multiple-Datapath (SIMD) architectures, where the loop contains multiple non-stride-one memory accesses that operate over a contiguous strea... | 04/29/2008 |
| 7356545 | Enabling relational databases to incorporate customized intrusion prevention policies A method for preventing intrusions in a database system is provided. When the database system receives a request to execute a database command, the database command is parsed to generate parsed information. Before executing the database command, the parsed informati... | 04/08/2008 |
| 7353163 | Exception handling method and apparatus for use in program code conversion A method of handling exceptions for use in an emulator (20) performing program code conversion. Registers (X) of a subject machine (11) being emulated (20) are represented by a pair of abstract registers (XA,XB) on the targ... | 04/01/2008 |
| 7353521 | Object oriented distributed software system with methodology for piggybacked reflective callbacks A distributed computing environment is described that provides an improved method for invocation of methods between remote objects. In one embodiment, the improved method comprises steps of: creating a first object having methods that may be invoked by other objects... | 04/01/2008 |
| 7353491 | Optimization of memory accesses in a circuit design Methods and apparatus for optimizing memory accesses in a circuit design are described. According to one embodiment, a method comprises identifying a subset of variables from a multi-variable memory space that are accessed by a plurality of loops, storing the subset... | 04/01/2008 |
| 7353503 | Efficient dead code elimination Disclosed is a method for eliminating dead code from a computer program using an operands graph generated from a flow graph of a computer program. In one embodiment of the present invention, the operands graph is traversed for any unused operands. Upon detection of ... | 04/01/2008 |
| 7350185 | System, method, and computer program product for effort estimation A system and method for establishing an estimate for proposals and other customer requests which precludes an extensive up front investment in expert opinion and design. This is accomplished by applying a pattern-based technique toward rough application effort sizin... | 03/25/2008 |
| 7350061 | Assigning free register to unmaterialized predicate in inverse predicate expression obtained for branch reversal in predicated execution system Described is a method that identifies a predicate expression representing conditions in predicated assembly language instructions that determine a direction of a conditional branch instruction. The predicate expression is employed to enable a transformation to be ma... | 03/25/2008 |
| 7340729 | Reducing recompilation frequency An article of manufacture and a method includes providing a system having an interface, dividing the interface into levels, associating a dependency list with a level, associating a client with the dependency list, and marking the clients associated with a dependenc... | 03/04/2008 |
| 7330962 | Dynamic instruction sequence selection during scheduling A list scheduler in a compiler can select from a plurality of alternative instruction sequences for one or more computation performed within an application. A scheduler can initially identify and track one or more computations for which multiple alternative instruct... | 02/12/2008 |
| 7313790 | Methods and apparatus for preserving precise exceptions in code reordering by using control speculation Methods and apparatus for preserving precise exceptions in code reordering by using control speculation are disclosed. A disclosed system uses a control speculation module to reorder instructions within an application program and preserve precise exceptions. Instruc... | 12/25/2007 |
| 7310799 | Reducing load instructions via global data reordering A method for improving program performance including reordering a global data area of a program and for each load instruction referencing global variables within range of the immediate part of an add immediate instruction from a TOC anchor, replacing the load instru... | 12/18/2007 |
| 7305649 | Automatic generation of a streaming processor circuit A streaming processor circuit of a processing system is automatically generated by selecting a set of circuit parameters consistent with a set of circuit constraints and generating a representation of a candidate streaming processor circuit based upon the set of cir... | 12/04/2007 |
| 7305665 | Compiler register allocation and compilation Assigns suitable registers to a plurality of variables. A compiler converts a source program into instructions for a processor having: a simultaneously used variable acquisition section which obtains, with respect to each of a plurality of variables used in the sour... | 12/04/2007 |
| 7305654 | Test schedule estimator for legacy builds A test schedule estimator for performing fixes on released software. In a preferred embodiment, historic data from similar builds are used with other data to estimate a time required to perform testing and release based on the number of fixes implemented. ... | 12/04/2007 |
| 7299458 | System and method for converting control flow graph representations to control-dataflow graph representations An embodiment of the invention includes a method of forming a control-dataflow graph that includes separating a control flow graph into two or more basic blocks, and converting said two or more basic blocks into code blocks, where the code blocks are formed into the... | 11/20/2007 |