A simulation environment for the sport of boxing utilizing a robotic machine interface system which carries a person.
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8181086 | Memory array error correction apparatus, systems, and methods Various embodiments include apparatus, methods, and systems that operate to extend the processes of reading, modifying, and writing data stored in or being provided to a memory array without interrupting a continual stream of data to be written into the memory array... | 05/15/2012 |
| 8161352 | Method for providing unequal error protection to data packets in a burst transmission system The present invention relates to a method for providing an equal error protection to data packets in a burst transmission system. The data packets are grouped based upon respective priority levels and error protection is provided to each group of data packets based ... | 04/17/2012 |
| 8151165 | Modification to Meggitt decoder for burst error correction codes Apparatus and methods are provided to correct burst errors from a communication channel. Embodiments may include correcting burst errors in received data using a decoder configured as a Meggitt decoder with an additional selection criterion to correct a burst error ... | 04/03/2012 |
| 8136013 | Burst error correction based on fire code According to an example embodiment, an apparatus may include logic. The apparatus may be configured to: determine, based on an error location polynomial, an error location syndrome corresponding to an actual location of a burst error in a data block; select a burst ... | 03/13/2012 |
| 8132076 | Method and apparatus for interleaving portions of a data block in a communication system Circuit, method, and computer program for reordering data units of a data block in accordance with a first pre-determined function. The method includes, for each data unit of the data block—(i) generating an address corresponding to a memory location of a single-p... | 03/06/2012 |
| 8127199 | SDRAM convolutional interleaver with two paths An SDRAM convolutional interleaver with two paths. Symbols are assigned to a given one of the two paths, then are sorted to minimize (to one) a number of breaks in a sequential Interleaver write address. After sorting, the symbols are stored staggered in SRAM and bu... | 02/28/2012 |
| 8020071 | Device with MPE-FEC frame memory In transmission systems using digital video broadcasting standards for handheld terminals data is transmitted in bursts. Due to the restricted computing time, buffering of one or more bursts is necessary. The invention provides a memory optimalization for consecutiv... | 09/13/2011 |
| 7987406 | Wireless communications apparatus and method A wireless communications apparatus according to the present invention includes a scheduler which allocates, to a user apparatus, at least one resource block included in a system bandwidth; an interleaver which rearranges an order of bits within a bit sequence accor... | 07/26/2011 |
| 7949927 | Error correction method and apparatus for predetermined error patterns In a method of detecting an error pattern in a codeword transmitted across a noisy communication channel, a codeword is detected. A syndrome is then generated by applying a generator polynomial to the codeword. The generator polynomial is adapted to produce a distin... | 05/24/2011 |
| 7945840 | Memory array error correction apparatus, systems, and methods Various embodiments include apparatus, methods, and systems that operate to extend the processes of reading, modifying, and writing data stored in or being provided to a memory array without interrupting a continual stream of data to be written into the memory array... | 05/17/2011 |
| 7861137 | System for identifying localized burst errors A system for detecting one or more localized burst errors in a receiving message comprised of a plurality of codewords. The system comprises a trellis code decoder for decoding a receiving message with a plurality of codewords and calculating one or more cumulative ... | 12/28/2010 |
| 7856587 | Memory reduction in DVB-H applications A method of storing DVB-H data from a DVB-H data burst, the method comprising: identifying erasures in the data burst; and storing non-erasure data from the data burst in memory locations of a memory that would be used to store erasures. ... | 12/21/2010 |
| 7818651 | Semiconductor memory device having data holding mode using ECC function When memory cells enter a data holding mode, a control circuit of a semiconductor memory device reads out a plurality of data from the memory cells to generate and store a check bit for error detection and correction, and performs a refresh operation in a period wit... | 10/19/2010 |
| 7802167 | Apparatus and method for detecting extended error bursts A system and method are provided to detect an extended error burst in a data interface. An original error burst has a given length prior to or during transmission. Data transmission processing can extend the original error burst beyond its original length to become ... | 09/21/2010 |
| 7730382 | Method and system for managing memory in a communication system using hybrid automatic repeat request (HARQ) A method and system for managing memory using Hybrid Automatic Repeat Request in a communication system is provided. The method includes storing a retransmitted burst in a memory. The retransmitted burst includes plurality of bits. One or more of memory address of t... | 06/01/2010 |
| 7685498 | Digital broadcasting system and digital broadcast transmission and reception method A digital broadcasting system transmitting and receiving a broadcast stream created from a broadcast source. The system includes a hierarchical coding unit (2) coding the broadcast source depending on a characteristic of the broadcast source and generating, f... | 03/23/2010 |
| 7644340 | General convolutional interleaver and deinterleaver A circuit is provided for performing interleaving and deinterleaving functions in a digital communication system. The circuit includes a single-port memory that reads first data units from a first interleaved sequence of address locations to generate a first data st... | 01/05/2010 |
| 7568145 | Prunable S-random interleavers A system, method and machine-readable medium for pruning an S-random interleaver starting with an interleaver permutation having N elements and alternating between invalidating the last element of the interleaver permutation and invalidating the last element of a co... | 07/28/2009 |
| 7555698 | Method and apparatus for extracting specific data from BIS data Methods and apparatus for extracting a portion of data from a plurality of BIS data are disclosed. The portion of data can be extracted from the plurality of BIS data stored in a first storage unit when those BIS data are accessed by other components. Alternatively,... | 06/30/2009 |
| 7526712 | Deinterleaving apparatus and method using inner memory and outer memory An apparatus and a method for deinterleaving using an inner memory and an outer memory. The apparatus includes data receiving apparatus of a mobile equipment in a mobile communication system including the mobile equipment and a base station for transmitting data to ... | 04/28/2009 |
| 7464319 | Forward error correction with codeword cross-interleaving and key-based packet compression An encoder encodes each of a plurality of data fragments into an encoded packet comprising a plurality of codewords, each codeword comprising a set of data bytes from the data fragment and at least one error-correction byte derived from the set of data bytes. A plur... | 12/09/2008 |
| 7441163 | Method of recording/reproducing digital data and apparatus for same A digital data recording/reproducing method includes the steps of: interleaving data on a PI code for each PI code of a 208-row ECC block; and converting a short burst error into random errors by dispersing errors on the PI codes. Moreover, the digital data recordin... | 10/21/2008 |
| 7433358 | Characterization of impaired intervals in a voice over packet session using audio frame loss concealment An embodiment may include an apparatus comprising a dejitter buffer to receive packets containing audio data, a codec coupled with the dejitter buffer, the codec to receive coded audio frames from the dejitter buffer and decode them, and a concealed seconds meter co... | 10/07/2008 |
| 7421626 | Method of recording/reproducing digital data and apparatus for same A digital data recording/reproducing method includes the steps of: interleaving data on a PI code for each PI code of a 208-row ECC block; and converting a short burst error into random errors by dispersing errors on the PI codes. Moreover, the digital data recordin... | 09/02/2008 |
| 7421627 | Method of recording/reproducing digital data and apparatus for same A digital data recording/reproducing method includes the steps of: interleaving data on a PI code for each PI code of a 208-row ECC block; and converting a short burst error into random errors by dispersing errors on the PI codes. Moreover, the digital data recordin... | 09/02/2008 |
| 7406636 | Method of recording/reproducing digital data and apparatus for same A digital data recording/reproducing method includes the steps of: interleaving data on a PI code for each PI code of a 208-row ECC block; and converting a short burst error into random errors by dispersing errors on the PI codes. Moreover, the digital data recordin... | 07/29/2008 |
| 7395482 | Data storage systems A data storage system includes an encoder subsystem comprising an error correction code encoder, a modulation encoder, and a precoder, and a decoder subsystem similarly comprising a detector, an inverse precoder, a channel decoder, and an error correction code decod... | 07/01/2008 |
| 7389467 | Method of error correction coding, and apparatus for and method of recording data using the coding method A method of recording data includes forming a plurality of codewords by error correction coding a predetermined amount of inputted data according to a predetermined method, and recording the data including the plurality of codewords to the small-sized optical disc i... | 06/17/2008 |
| 7389465 | Error detection and correction scheme for a memory device Data is read from a memory array. Before being stored in a data buffer, a Hamming code detection operation and a Reed-Solomon code detection operation are operated in parallel to determine if the data word has any errors. The results of the parallel detection operat... | 06/17/2008 |
| 7376882 | Adaptable channel compensation for reliable communication over fading communication links A method for reducing fading channel signal data loss for serial data rates up to approximately 10 gigabits per second includes sequentially distributing serial data to multiple encoders. Individual data bytes are sent from the encoders to a convolutional interleave... | 05/20/2008 |
| 7370262 | Apparatus and method generating error flag for error correction An error flag generation apparatus and method for error correction, wherein the apparatus includes: a frame-sync error memory which stores frame-sync error information for each data block; a BIS (Burst Indicator Subcode) error flag memory which stores a BIS error fl... | 05/06/2008 |
| 7352780 | Signaling byte resiliency A method and system for providing signaling byte resiliency across a telecommunications network. Embodiments of the invention create copies of original signaling bytes and transports the copies in addition to the original signaling bytes. Testing is performed at eac... | 04/01/2008 |
| 7353438 | Transparent error correcting memory A memory system with transparent error correction circuitry provides full stuck-at fault coverage for both test data patterns and the corresponding error correction code (ECC) values. The memory system includes a semiconductor memory having a memory array, a memory ... | 04/01/2008 |
| 7353400 | Secure program execution depending on predictable error correction A CPU is provided with an ability to modify its operation, with respect to error correction, as a programmable feature. An error correction scheme is selected to be performed by the error correcting circuit. The compiled program may have intentionally introduced err... | 04/01/2008 |
| 7350133 | Error correction encoding apparatus and method and error correction decoding apparatus and method An error correction encoding method including generating error correction code data, which is a predetermined number of bytes long, by error-correction-encoding user data in a predetermined manner; generating burst indicator subcode data, which is a predetermined nu... | 03/25/2008 |
| 7346827 | Forward error correction scheme for data channels using universal turbo codes A method of providing forward error correction for data services uses a parallel concatenated convolutional code which is a Turbo Code comprising a plurality of eight-state constituent encoders wherein a plurality of data block sizes are used in conjunction with sai... | 03/18/2008 |
| 7343540 | Forward error correction coding in ethernet networks A method for improving the bit error rate of Ethernet packets applies forward error correction (FEC) coding to transmitted packets. The FEC coding is systematic block coding, and is applied so that the coded packets can be interpreted by legacy network devices that ... | 03/11/2008 |
| 7343543 | Method, system and apparatus for transmitting interleaved data between stations A system for transmitting data between stations, such as base stations and subscriber stations in a wireless telecommunications system, employs variable set of interleaving parameters for its interleaving operations. By using different set of interleaving parameters... | 03/11/2008 |
| 7340668 | Low power cost-effective ECC memory system and method A memory controller couples 32-bit data words to and from a DRAM. The DRAM generates error checking and correcting syndromes to check and correct read data. The DRAM generates the syndromes from respective 128-bit data words each formed by 4 32-bit data words writte... | 03/04/2008 |
| 7340663 | Method and apparatus for embedding an additional layer of error correction into an error correcting code A method of embedding an additional layer of error correction into an error correcting code, wherein information is encoded into code words of said code over a first Galois field and wherein a number of code words are arranged in the columns of a code block comprisi... | 03/04/2008 |