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| Number | Title | Issue Date |
| 8190964 | Decoding method A method for decoding forward error correction (FEC) encoded data. A stream of units of FEC encoded bits are received, where the units are derived from a transmitted signal, where each unit represents a one-bit data value, and where each unit includes correctness bi... | 05/29/2012 |
| 8190963 | Error correction using error detection codes A method includes receiving a detected sequence representing a signal on a channel. The detected sequence includes data bits and one or more error detection code bits. One or more error indications are received for the detected sequence. Each of the one or more erro... | 05/29/2012 |
| 8185796 | Mitigation of fiber nonlinearities in multilevel coded-modulation schemes A receiver and method are provided for mitigation of finer non-linearities in multilevel coded-modulation schemes. The receiver includes a multilevel Bahl-Cocke-Jelinek-Raviv (BCJR) equalizer configured to receive channel samples of an input signal, partially mitiga... | 05/22/2012 |
| 8176381 | Multidimensional turbo product codes and generalized low-density parity-check codes with component reed-solomon codes for optical transmission A transmitter, a receiver, and corresponding methods are provided. The transmitter includes encoders configured to encode source bit streams from L information sources into bytes of codewords. Each encoder includes different (n, k) multidimensional turbo-product cod... | 05/08/2012 |
| 8171369 | DTV transmitting system and receiving system and method of processing broadcast data A DTV transmitting system includes a frame encoder, a randomizer, a block processor, a group formatter, a deinterleaver, and a packet formatter. The frame encoder builds an enhanced data frame and encodes the frame two times for first and second error correction, re... | 05/01/2012 |
| 8161347 | Interleaving parity bits into user bits to guarantee run-length constraint A method of satisfying a specified run length constraint is disclosed. A systematically error correction encoded sequence of received symbols is received, wherein the received symbols include data symbols and parity symbols. The parity symbols are interleaved with t... | 04/17/2012 |
| 8151162 | Encoding device, decoding device, encoding/decoding device, and recording/reproducing device An error correction device error corrects without increasing in circuit scale. An encoder, includes: a first ECC encoder which interleaves a data string into n (n≧2) blocks of data strings at every m (m≧2) bits, and adds the error correction code parity; a parit... | 04/03/2012 |
| 8145974 | Virtual limited buffer modification for rate matching Virtual limited buffer modification for rate matching. A reduced-size memory module is employed within a communication device to assist in storage of log-likelihood ratios (LLRs) employed in accordance with turbo decoding. This architecture is also applicable to oth... | 03/27/2012 |
| 8140932 | Data interleaving circuit and method for vectorized turbo decoder A data interleaving circuit and method for interleaving a data block comprising M windows of W values include an index generator for generating an intra-window index w and an inter-window permutation vector m having M elements and an inter-window permutation ... | 03/20/2012 |
| 8140933 | Buffering packets of a media stream Buffering packets of a media stream for transmission from a transmitting device to a receiving device. Media packets are formed from at least one kind of media information in a stream generator; forward error correction data is formed on the basis of the media packe... | 03/20/2012 |
| 8140934 | LDPC-coded multilevel modulation scheme A PMD compensation scheme suitable for use in multilevel block-coded modulation schemes with coherent detection. ... | 03/20/2012 |
| 8140935 | ECC controller for use in flash memory device and memory system including the same An ECC (error correction code) controller of a flash memory device which stores an M-bit data (M being a positive integer equal to or greater than 2) comprises a first ECC block which generates a first ECC data from a program data to be stored in the flash memory de... | 03/20/2012 |
| 8136008 | ECC with out of order completion Processing a sequence of data frames in an error correction code (ECC) decoder is disclosed. Processing includes receiving a first data frame in the sequence of data frames, initiating processing of the first data frame through the ECC decoder, receiving a second da... | 03/13/2012 |
| 8136007 | Adaptive error correction A system and method for adaptive error correction that optimizes bandwidth by taking into account expected, or predicted, interferences. The bandwidth used for error correction is applied judiciously based on the value of the content and the need to receive the cont... | 03/13/2012 |
| 8132072 | System and method for providing H-ARQ rate compatible codes for high throughput applications In one embodiment, the present patent application comprises a method and apparatus to generate low rate protographs from high rate protographs, comprising copying a base graph; permuting end points of edges of a same type in copies of the base graph to produce a per... | 03/06/2012 |
| 8132073 | Distributed storage system with enhanced security A client device or other processing device separates a file into blocks and distributes the blocks across multiple servers for storage. In one aspect, subsets of the blocks are allocated to respective primary servers, a code of a first type is applied to the subsets... | 03/06/2012 |
| 8127197 | Method and apparatus for radio link control padding for enhanced general packet radio service A method (300) for radio link control padding is shown. In its simplest form, it can include the steps of: providing (310) N bytes of data from a base station; interleaving (320) the N bytes of data using a turbo-interleaver; pre-pending (330... | 02/28/2012 |
| 8127198 | Adaptable channel compensation for reliable communication over fading communication links A method for reducing fading channel signal data loss for serial data rates up to approximately 10 gigabits per second includes sequentially distributing serial data to multiple encoders. Individual data bytes are sent from the encoders to a convolutional interleave... | 02/28/2012 |
| 8117517 | Semiconductor memory device and method of controlling the same A semiconductor memory device includes a plurality of detecting code generators configured to generate a plurality of detecting codes to detect errors in a plurality of data items, respectively, a plurality of first correcting code generators configured to generate ... | 02/14/2012 |
| 8117515 | Methodology and apparatus for soft-information detection and LDPC decoding on an ISI channel A system comprising a plurality of channel detectors (CDs) receiving quantized and equalized ISI channel information indicative of an LDPC codeword. The channel information is split for input to the CDs, such that each CD receives channel information indicative of a... | 02/14/2012 |
| 8117516 | Apparatus and method for signal transmission/reception in a communication system A method and an apparatus for transmitting a signal in a communication system are provided. An information vector is encoded according to a Low Density Parity Check (LDPC) encoding scheme, thereby generating an LDPC codeword. Minimum surviving check nodes are reserv... | 02/14/2012 |
| 8112689 | ECC controller for use in flash memory device and memory system including the same An ECC (error correction code) controller of a flash memory device which stores an M-bit data (M being a positive integer equal to or greater than 2) comprises a first ECC block which generates a first ECC data from a program data to be stored in the flash memory de... | 02/07/2012 |
| 8108751 | Turbo decoding apparatus A turbo decoding apparatus comprises: a backward-probability calculation unit that executes backward-probability calculation from time N to time 0 with respect to coded data having an information length N (N is a natural number) which is encoded with turbo-encoding;... | 01/31/2012 |
| 8108752 | Error correcting device, method, and program A device, method, and program are provided to prevent an increase of the probability of erroneous correction for a burst error having a length exceeding detection capability even if high correction capability is selected for a random error. In one embodiment, an app... | 01/31/2012 |
| 8103931 | Method for constructing large-girth quasi-cyclic low-density parity-check codes A method constructs a code, wherein the code is a large-girth quasi-cyclic low-density parity-check code. A base matrix is selected for the code. A cost matrix corresponding to the base matrix is determined. A single element in the base is changed repeatedly maximiz... | 01/24/2012 |
| 8103932 | DTV transmitting system and receiving system and method of processing broadcast data A DTV transmitting system includes a frame encoder, a randomizer, a block processor, a group formatter, a deinterleaver, and a packet formatter. The frame encoder builds an enhanced data frame and encodes the frame two times for first and second error correction, re... | 01/24/2012 |
| 8095845 | System and method for assigning code blocks to constituent decoder units in a turbo decoding system having parallel decoding units A system for, and method of, assigning code blocks to constituent decoding units in a turbo decoding system having parallel decoding units. In one embodiment, the system includes: (1) a resource model generator configured to generate a model that represents the cons... | 01/10/2012 |
| 8086933 | Semiconductor storage device, method of controlling the same, and error correction system A semiconductor storage device, a method of controlling the same, and an error correction system allow reduction in power consumption and circuit scale without detriment to error correction capability. An error correction code (ECC) circuit of a solid state drive (S... | 12/27/2011 |
| 8086932 | Apparatus and method for decoding low-density parity check code There is provided with a decoding apparatus for decoding a low-density parity check code defined by a parity check matrix, includes: a first operation unit configured to carry out a row operation for each row of the parity check matrix; a calculation unit configured... | 12/27/2011 |
| 8082479 | Methods and apparatus for generating permutations Methods and apparatus for determining at least one permutation of a set of a K number of values are disclosed. The methods and apparatus utilize a first permutation functionality that maps an index value to another value within the set of K values according to the f... | 12/20/2011 |
| 8078935 | Method and system for encoding and decoding information with modulation constraints and error control A method and system for encoding a segment of user data words into a segment of code words so that both modulation constraints and a predetermined parity-check constraint are satisfied. Each segment of the user data is partitioned into several data words, and encode... | 12/13/2011 |
| 8078936 | Encoding method, encoding apparatus, and program An encoding method encodes by using a quasi-cyclic code having a code length of n=m n0 and an information word length of k=m k0. The method includes the steps of: creating a systematic code with as many as (n0−k0) parity... | 12/13/2011 |
| 8078934 | Communication method and apparatus In a frame sync method, a receiver searches for the presence of an N-symbol long unique word pattern. For each possible frame sync detected, the receiver proceeds to demodulation and FEC processing. After each iteration of the FEC decoder, the detected unique word p... | 12/13/2011 |
| 8074143 | Detection, avoidance and/or correction of problematic puncturing patterns in parity bit streams used when implementing turbo codes Detecting, avoiding and/or correcting problematic puncturing patterns in parity bit streams used when implementing punctured Turbo codes is achieved without having to avoid desirable code rates. This enables identification/avoidance of regions of relatively poor Tur... | 12/06/2011 |
| 8069388 | Distributed block coding (DBC) Various embodiments implement distributed block coding (DBC). DBC can be used for, among other things, distributed forward error correction (DFEC) of source data in communication systems or parity backup for error correction of source data in storage systems where t... | 11/29/2011 |
| 8069387 | Turbo coding having combined turbo de-padding and rate matching de-padding Turbo coding having combined turbo de-padding and rate matching de-padding. An approach is presented by which a singular module is operable to perform both zero bit de-padding and dummy bit de-padding in accordance with turbo encoding. Zero padding can be performed ... | 11/29/2011 |
| 8065587 | Reduced complexity ARP (almost regular permutation) interleaves providing flexible granularity and parallelism adaptable to any possible turbo code block size Reduced complexity ARP (almost regular permutation) interleaves providing flexible granularity and parallelism adaptable to any possible turbo code block size. A novel means is presented by which any desired turbo code block size can be employed when only requiring,... | 11/22/2011 |
| 8055974 | Content distribution method, encoding method, reception/reproduction method and apparatus, and program There are provided a content data transmission method, device, and program that minimize serious disturbances in reproduced content on the reception side, caused by a transmission error of encoded data, without sending feedback information from the reception side to... | 11/08/2011 |
| 8055973 | Channel constrained code aware interleaver An interleaver is constructed based on the joint constraints imposed in the channel and the code domains. A sequentially optimal algorithm is used for mapping bits in the inter-symbol interference (ISI) domain to the code domain by taking into account the ISI memory... | 11/08/2011 |
| 8051358 | Error recovery storage along a nand-flash string Apparatus and methods store error recovery data in different dimensions of a memory array. For example, in one dimension, block error correction codes (ECC) are used, and in another dimension, supplemental error correction codes, such as convolutional codes, are use... | 11/01/2011 |
