U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Icon_funbox Did You Know...

...that Thomas Edison's patent application on his phonograph was approved by the Patent Office in just seven weeks? In contrast, it took Gordon Gould, the inventor of the laser, 30 years to obtain his patent -- finally awarded in 1988!

Newsletter  PatentStorm News

Make the Most of Our Site

See this month's Top Inventors and Most Cited Patents.

Stay on top of the latest innovations by subscribing to an RSS feed.

Registered users: Manage your profile.

 

Class 714/753 - Double error correcting with single error correcting code


Subclass of Class 714 - Error detection/correction and fault detection/recovery
Definition: Subject matter in which a single bit error correcting code
No. of patents: 105
Last issue date: 01/24/2012


1      
NumberTitleIssue Date
8103930Apparatus for implementing processor bus speculative data completion
A method, and apparatus are provided for implementing processor bus speculative data completion in a computer system. A memory controller in the computer system sends uncorrected data from a memory to a processor bus. The memory controller also applies the uncorrect...
01/24/2012
7979826Computer-readable storage media comprising data streams having mixed mode data correction capability
Methods of providing error correction in configuration bitstreams for programmable logic devices (PLDs). While any error correction method can be used, in one embodiment a Hamming code is applied to instructions in the configuration bitstream, while a product code i...
07/12/2011
7870459High density high reliability memory module with power gating and a fault tolerant address and command bus
A high density high reliability memory module with power gating and a fault tolerant address and command bus. The memory module includes a rectangular printed circuit board having a first side and a second side, a length of between 149 and 153 millimeters and first ...
01/11/2011
7827463Semiconductor memory device
In a semiconductor memory device having an error-correction function: one or both of a portion of a set of data bits and a set of parity bits based on the set of data bits are held, where the set of data bits and the set of parity bits constitute a code for error co...
11/02/2010
7827462Combined command and data code
An apparatus includes a source for a command and an associated data. An error code generator generates an error code for the combined command and associated data, which is distributed among the command and the associated data. A transmitter then transmits the comman...
11/02/2010
7712006System and method for conveying information
A system for conveying information includes a signal transport device. The signal transport device includes a set of links operable to convey a first set of information signals from a first computer module to a second computer module and a link operable to convey a ...
05/04/2010
7502982Iterative detector with ECC in channel domain
A communications channel is provided, which includes a receive path having an iterative decoder and an ECC decoder. The iterative decoder has a soft channel detector with a soft output. The ECC decoder is coupled to decode bits produced from soft information receive...
03/10/2009
7426672Method for implementing processor bus speculative data completion
A method, and apparatus are provided for implementing processor bus speculative data completion in a computer system. A memory controller in the computer system sends uncorrected data from a memory to a processor bus. The memory controller also applies the uncorrect...
09/16/2008
7380195Error correction using error detection codes
A method, apparatus, and computer-readable media comprises receiving a detected sequence representing a signal on a channel, wherein the detected sequence comprises data bits and one or more error detection code bits; receiving one or more error indications for the ...
05/27/2008
7360143Redundant storage of computer data
Redundant storage of computer data including encoding N data values through M linear expressions into M encoded data values and storing each encoded data value separately on one of M redundant storage devices where M is greater than N and none of the linear expressi...
04/15/2008
7350131Error protecting groups of data words
Disclosed are, inter alia, methods, apparatus, data structures, computer-readable media, and mechanisms, for use in protecting groups of data words. One embodiment manipulates these data words to generate a resultant data word and an error correction code thereon fo...
03/25/2008
7328391Error correction within a cache memory
A cache memory includes error bits corresponding to each line of data. An error detecting circuit uses these error bits to detect if a soft error has occurred within the data of a cache line. If such an error has occurred, then the line may be refilled from the main...
02/05/2008
7328365System and method for providing error check and correction in memory systems
A system for providing error check and correction (ECC) is provided. The system includes an ECC interface for storing ECC codes in a first memory system and storing data in a second memory system. The ECC interface corrects errors in the data received from the secon...
02/05/2008
7296211System and method for transferring data on a data link
A system and method are provided for transferring a packet across a data link. The packet may include a stream of data symbols which is delimited by one or more framing symbols. Corruptions of the framing symbol which result in valid data symbols may be mapped to in...
11/13/2007
7292161NB/MB coding apparatus and method using both disparity independent and disparity dependent encoded vectors
Techniques for encoding N-binary symbol (NB) source data vectors into M-binary symbol (MB) encoded vectors, M>N>0, are provided. Techniques for decoding are also provided. Exemplary coding and decoding apparatuses are presented, as is an exemplary 8B/10B encoding sc...
11/06/2007
7292950Multiple error management mode memory module
A memory module comprises a plurality of storage bits for each memory location, and a plurality of error management storage bits for each memory location. A memory controller is operable to change error management modes on the memory module. Changing error managemen...
11/06/2007
7289861Process control system with an embedded safety system
A process plant includes a process control system having a safety system embedded therein. The integrated process control and safety system includes a host computer arranged to send and receive process level messages and safety level messages, a controller operative...
10/30/2007
7284182Error correction on M-bit encoded links
Error correction on high speed interconnection links—backplane or extended wires (cable, optical fiber)—is exhaustively considered by many telecommunication vendors, especially those who offer “scalable router” products. Since the 64b/66b encoding scheme is ...
10/16/2007
7278083Method and system for optimized instruction fetch to protect against soft and hard errors
A method of detecting error during transfer of instructions from a data memory to a computer processor. At the time of the commencement of transmission of the instructions, the raw data signal is checked for an error detection code indicating data corruption. If the...
10/02/2007
7269679PCI-X error correcting code (ECC) pin sharing configuration
A method is provided for utilizing four error correcting code (ECC) pin connections of a PCI/PCI-X bus for one of Grant (GNT) and Request (REQ) pin connections. The method determines a mode of the PCI bus to be PCI-X Mode 1, PCI-X Mode 2, or PCI. If the determined m...
09/11/2007
7249296Semiconductor integrated circuit
An ECC circuit has an error correction function of N (N is a natural number) bits for output data of a memory cell array. A BIST circuit reads background data out of test target addresses, and writes/reads inverted data of the background data in at least a part of t...
07/24/2007
7249304Apparatus and method for error correction in a CDMA mobile communication system
An FEC apparatus and method is provided that uses turbo codes. An input frame is iteratively decoded until an iterative decoding stop command is received under a predetermined control, and the absolute reliability of each symbol in the frame is output. The minimum o...
07/24/2007
7249203Programmatic time-gap defect detection apparatus and method
Programmatic detection of time-gap defects in computer system hardware where data is corrupted without detection by the computer system. A detection module initiates data transfers between devices in a computer system. An interrupt service routine interrupts the pro...
07/24/2007
7188295Method and apparatus for embedding an additional layer of error correction into an error correcting code
A method of embedding an additional layer of error correction into an error correcting code, where information is encoded into code words that are arranged in columns of a code block. The method includes reducing the length of each row of the code block by adding ro...
03/06/2007
7187991Failsafe control circuit for electrical appliances
Failsafe control circuit for electrical appliances whereby at least one electrical load (10) is activated, the control circuit comprising logic control means (1), operation switching means (8) between said electrical load (10) and a suppl...
03/06/2007
7187650Fibre channel frame-mode GFP with distributed delimiter
A technique for providing multiple Fibre Channel frames in one frame-mapped GFP transport frame. GFP conventions are followed, except that a Distributed Delimiter marks each Fibre Channel frame in the payload of GFP transport frame. The Distributed Delimiter has a F...
03/06/2007
7171591Method and apparatus for encoding special uncorrectable errors in an error correction code
An error correction code for encoding the presence of a special uncorrectable error as well as its type. In the encoder, modification logic modifies the regular data symbols to indicate the type of special uncorrectable error. The encoder appends to the regular data...
01/30/2007
7149947Method of and system for validating an error correction code and parity information associated with a data word
A data processing system includes an input portion for receiving a digital word having N bits of data and M bits for error detection, a first error correction code generator for generating a first error correction code based on the N bits of data of the digital word...
12/12/2006
7143328Auxiliary data transmitted within a display's serialized data stream
Techniques to transmit auxiliary data are disclosed. One technique includes generating a control signal from a video data enable signal and an auxiliary data enable signal, and combining an auxiliary data signal and a video data signal into a composite data signal u...
11/28/2006
7111220Network physical layer with embedded multi-standard CRC generator
Disclosed are methods and structures for preparing data for transmission over a network. In an embodiment consistent with the OSI network model, transmit and receive CRC generators are moved from the link layer to the physical layer, which frees up valuable programm...
09/19/2006
7100103Efficient method for fast decoding of BCH binary codes
A method for decoding a received word, including calculating a syndrome of the received word as a plurality of binary element vectors, generating respective logarithms of the binary element vectors, and determining, in response to the logarithms, an indication of a ...
08/29/2006
7096414In-line wire error correction
An error correction scheme for transmission of electronic data using an in-line error correction where there are no explicit wires for error correction code (ECC) bits. A method for in-line error detection and correction is described which uses 0 to k wires, ...
08/22/2006
7069494Application of special ECC matrix for solving stuck bit faults in an ECC protected mechanism
A method of correcting an error in an ECC protected mechanism of a computer system, such as a cache or system bus, by applying data with a number of bits N to an error correction code (ECC) matrix to yield an error detection syndrome, wherein the ECC matrix has a pl...
06/27/2006
7069482ROM error-correction control
To determine the occurrence of an address for a defective memory, cell in a ROM, an error-correction control system includes a comparator that compares a set of incoming memory address signals with static signals provided by a laser-fuse array. The static signals re...
06/27/2006
7064489Huffman data compression method
A method of compressing a character by determining an overall code specific to the character comprising the steps of: a) grouping the characters in terms of a common behaviour pattern; b) where the number of characters within that group is odd, creatin...
06/20/2006
7027256Disk drive having servo sectors that store repeatable runout correction values and related error correction code data
A magnetic disk drive having a reduction in repeatable runout (RRO) effects is disclosed. The disk drive has a head disk assembly (HDA) and a sampled servo controller. The HDA includes a rotating magnetic disk, an actuator, and a transducer head. The magnetic disk h...
04/11/2006
7020810Method and apparatus for propagating error status over an ECC protected channel
System and methods for propagating error status over an error checking and correcting (ECC) protected channel. A first device receives data and an error status associated with the data. The first device generates check bits for the data based on a first ECC code and...
03/28/2006
6999127Apparatus and method for image conversion and automatic error correction for digital television receiver
Disclosed is an apparatus and method for image conversion and automatic error correction for a digital television receiver (TV) which can improve the picture quality by converting an image signal for a TV or PC that displays an image having an RGB format into an ima...
02/14/2006
6993697Method for obtaining from a block turbo-code an error correcting code of desired parameters
The present invention concerns a method for obtaining an error correcting code of a given first size (N), including a systematic information part of a given second size (K) and a redundancy part. A block turbo-code is first obtained from said systematic information ...
01/31/2006
6983411Receiving apparatus and method using multicarrier modulation
An equalizing and error correcting section includes an equalizing section, an error processing sections, and a select section. The equalizing section outputs the received data subjected only to channel compensation and phase rotation compensation and the received da...
01/03/2006
1      
 
Sign InRegister
Username  
Password   
forgot password?