Did You Know...
...that the Slinky toy was the result of a failed attempt by engineer Richard James to produce an antivibration device for ship instruments? His goal was to develop a spring that would instantaneously counterbalance the wave motion that rocks a ship at sea. Instead, he developed the Slinky.
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| Number | Title | Issue Date |
| 8190961 | System and method for using pilot signals in non-volatile memory devices A memory system includes a selector module that selects and switches between one of N sequences of signal levels for pilot data. The N sequences are different, and N is an integer greater than 1. A multiplexer module selectively combines data and the pilot data and ... | 05/29/2012 |
| 8190962 | System and method for dynamic maximal iteration A system and method for decoding a low-density parity-check (LDPC) codeword. The method includes updating a portion of a plurality of variable nodes and performing a partial parity check based on the updated variable nodes. Based on the result of the partial parity ... | 05/29/2012 |
| 8185793 | Data reproducing apparatus A data reproducing apparatus has a nonvolatile memory in addition to a memory for data processing. When data error is uncorrected, data and error correction codes other than uncorrected data are accumulated in the memory for data processing. Corrected data is couple... | 05/22/2012 |
| 8185794 | Media container file management The invention teaches a media container file comprising media data organized into media source blocks. The media source blocks are partitioned into source symbols that can be processed by a forward error correction (FEC) algorithm for generation of FEC redundancy da... | 05/22/2012 |
| 8185795 | Side channel for forward error correction used with long-haul IP links A system for error correction processing includes methods, software and/or devices for generating and using correction packets that may provide for the rebuilding of a lost data packet or other information packet. A correction packet may be generated at a transmitti... | 05/22/2012 |
| 8181082 | Wireless receiver system and method with automatic gain control A wireless receiver system with automatic gain control, which includes a receiving path, an analog to digital converter, an automatic gain control (AGC) device and a controller. The controller has an adjacent channel interference off mode, an adjacent channel interf... | 05/15/2012 |
| 8181081 | System and method for decoding correlated data A decoding system for a communication channel includes N parallel channel detection modules that generate N first probability vectors based on sequences of X correlated bits in each of N groups of correlated bits, respectively. N parallel updating modules generate M... | 05/15/2012 |
| 8176380 | Algebraic construction of LDPC (low density parity check) codes with corresponding parity check matrix having CSI (cyclic shifted identity) sub-matrices Algebraic method to construct LDPC (Low Density Parity Check) codes with parity check matrix having CSI (Cyclic Shifted Identity) sub-matrices. A novel approach is presented by which identity sub-matrices undergo cyclic shifting, thereby generating CSI sub-matrices ... | 05/08/2012 |
| 8171368 | Probabilistic transition rule for two-level decoding of reed-solomon codes Decoding data is disclosed, including computing a syndrome polynomial for Reed-Solomon encoded data, applying the Berlekamp-Massey method to solve key equations associated with the syndrome polynomial, comparing a linear feedback shift register (LSFR) length LÎ... | 05/01/2012 |
| 8171367 | Stopping criteria in iterative decoders Methods and apparatus for reducing power consumption in an iterative decoder. A memory stores a decoded codeword for a current iteration and an iteration terminator compares the decoded codeword for the current iteration to the codeword from prior iterations, and fu... | 05/01/2012 |
| 8166364 | Low density parity check decoder using multiple variable node degree distribution codes A decoding system comprises an iterative decoder that utilizes parity constraints to iteratively decode a block of data that consists of multiple code words, and a processor that controls the iterative decoder to selectively remove a subset of the parity constraints... | 04/24/2012 |
| 8166365 | Cycle slip location and correction Methods and techniques are disclosed for correcting the effect of cycle slips in a coherent communications system. A signal comprising SYNC bursts having a predetermined periodicity and a plurality of known symbols at predetermined locations between successive SYNC ... | 04/24/2012 |
| 8166363 | Decoding device and method A decoding device and method for decoding an LDPC code with high accuracy while suppressing an increase of the scale of a device. A check node calculator (181) performs check node calculations including calculations of a nonlinear function φ(x) and its inver... | 04/24/2012 |
| 8161344 | Circuits and methods for error coding data blocks A description is given of a circuit for creating an error coding data block for a first data block, including a first error coding path adapted to create the error coding data block in accordance with a first error coding; and a second error coding path adapted to c... | 04/17/2012 |
| 8161343 | Nibble encoding for improved reliability of non-volatile memory A wireless device to include a non-volatile memory to execute an encoding scheme to provide single-cell error detection and correction on program operations in which the initial nibble value is Fh and on program operations that result in a nibble value of 0h. The no... | 04/17/2012 |
| 8161345 | LDPC decoders using fixed and adjustable permutators In one embodiment, the present invention is a low-density parity-check (LDPC) decoder that has a plurality of variable node units (VNUs) that generate variable node messages and a plurality of check node units (CNUs) that generate check node messages. The variable n... | 04/17/2012 |
| 8156399 | Low density parity check codes decoder and method thereof A low density parity check codes decoder decodes an LDPC code with an arbitrary coding rate by the same configuration. The low density parity check codes decoder enables decoding of an LDPC code constituted by a base matrix of Mbmax rows and Nbmax columns and a perm... | 04/10/2012 |
| 8156398 | Parameter estimation based on error correction code parity check equations A method for operating a memory, which includes analog memory cells, includes encoding data with an Error Correction Code (ECC) that is representable by a plurality of equations. The encoded data is stored in a group of the analog memory cells by writing respective ... | 04/10/2012 |
| 8151161 | Apparatus and method for decoding using channel code An apparatus and method for decoding a channel code is disclosed. The method for decoding a channel code includes the steps of receiving a low density parity check (LDPC) encoded signal from a transmitting party, generating a parity check matrix by adjusting the ord... | 04/03/2012 |
| 8151160 | Configurable low-density parity-check decoder for LDPC codes of arbitrary block size and method of configuring the same A configurable low-density parity check code (LDPC) decoder and a method of configuring the decoder. In one embodiment, the configurable LDPC decoder includes: (1) pluralities of parity check units and bit node units, (2) direct and reverse multi-size barrel shifter... | 04/03/2012 |
| 8145971 | Data processing systems and methods for processing digital data with low density parity check matrix A data processing system for processing digital data with a low density parity check (LDPC) matrix includes: a storage device for storing a plurality of indices representing a plurality of shifting numbers, where the LDPC matrix comprises an array of elements, and a... | 03/27/2012 |
| 8145972 | Apparatus and method for coding in communication system Disclosed is a method and apparatus for coding in a communication system. The coding method includes generating an information codeword vector from an information vector, generating a first vector in the information vector from an information part of a parity check ... | 03/27/2012 |
| 8145973 | Data processing apparatus and method, and program In order to correctly perform error analysis, test, or the like, a 64B/66B converter of a PCS processing unit of a transmitter conforming to 10 GBASE-R PHY performs 64B/66B conversion on data on a block basis that is transmitted over four lanes, the block being form... | 03/27/2012 |
| 8140931 | Method and system for generating parallel decodable low density parity check (LDPC) codes An approach is provided for efficiently decoding low density parity check (LDPC) codes. A plurality of parallel processors decode the LDPC codes mapped by accessing a mapped matrix in a memory structure. The mapped matrix is constructed based on a parity check matri... | 03/20/2012 |
| 8140930 | Encoder and decoder by LDPC coding The present invention is intended to provide an LDPC coding scheme which is capable of efficiently implementing a high-performance and high-speed encoder and decoder of an error correcting code suitable for the field of communications such as mobile communications. ... | 03/20/2012 |
| 8136006 | Turbo decoding apparatus and method A turbo decoding method and apparatus for performing iterative decoding on a received signal is provided. A decoder receives a signal and an (N−1)th decoding result, performs Nth decoding thereon, and outputs first extrinsic information. A tr... | 03/13/2012 |
| 8136005 | Multi-mode iterative detector A storage system comprises a linear block encoder. A write circuit writes an output of the linear block encoder to a storage medium. A read circuit reads data from the storage medium. A channel decoder decodes the data. A soft linear block code decoder that decodes ... | 03/13/2012 |
| 8122314 | Defect recovery for iteratively-decoded data channel In iterative decoding, a data recovery scheme corrects for corrupted or defective data by incorporating results from a previous decoding iteration. In one embodiment, a final multiplexer selects between the final detector output or a previous detector output based o... | 02/21/2012 |
| 8117514 | Methods and apparatus for encoding data in a communication network Methods and apparatus for encoding data in a communication network. In an aspect, a method is provided for coding data. The method includes generating one or more permutations of the data, determining weights associated with each permutation, calculating one or more... | 02/14/2012 |
| 8108749 | Diversity combining iterative decoder An iterative decoder circuit includes an N number of sub-decoders, N−1 of the sub-decoders each being responsive to a baseband signal from one of M number of signal processing circuits. Each of the N−1 number of sub-decoders includes, an inner delay responsive t... | 01/31/2012 |
| 8099645 | LDPC codes and stochastic decoding for optical transmission A method for error correction and a decoder using low density parity check (LDPC) codes includes initializing extrinsic probability information between variable nodes and check nodes in a bipartite graph including generating a Bernoulli sequence according to a proba... | 01/17/2012 |
| 8099646 | Low density parity check (LDPC) code Low density parity check code (LDPC) base parity check matrices and the method for use thereof in communication systems. The method of expanding the base check parity matrix is described. Examples of expanded LDPC codes with different code lengths and expansion fact... | 01/17/2012 |
| 8099644 | Encoders and methods for encoding digital data with low-density parity check matrix A method for encoding digital data with a low-density parity check (LDPC) matrix includes: indirectly storing a non-regular portion of the LDPC matrix by storing a plurality of indices corresponding to a plurality of non-zero sub-matrices of the non-regular portion,... | 01/17/2012 |
| 8095844 | Digital information reproduction method An optical disc using super-resolution effects that achieves higher-density recording exceeding the optical resolution suffers from the signal-quality degradation caused by the normal resolution component included in the reproduction signal. To address this problem,... | 01/10/2012 |
| 8091006 | Spherical lattice codes for lattice and lattice-reduction-aided decoders Methods and apparatus for designing spherical lattice codebooks for use in data transmission systems are provided. A spherical lattice codebook is constructed by determining the channel statistics of one or more channels, which can be accomplished by observing a suf... | 01/03/2012 |
| 8086930 | Fixed-spacing parity insertion for FEC (Forward Error Correction) codewords Fixed-spacing parity insertion for FEC (Forward Error Correction) codewords. Fixed spacing is employed to intersperse parity bits among information bits when generating a codeword. According to this fixed spacing, a same number of information bits is placed between ... | 12/27/2011 |
| 8086928 | Methods and systems for terminating an iterative decoding process of a forward error correction block The invention provides methods and systems for terminating an iterative decoding process of a Forward Error Correction block (FEC). The iterative decoding process of the FEC block is terminated upon determining that the FEC block cannot be decoded successfully. A me... | 12/27/2011 |
| 8086929 | Method of executing LDPC coding using parity check matrix A low density parity check (LDPC) coding method, and more particularly, a method of executing LDPC coding using a parity check matrix is disclosed. The present invention comprises providing an information bit stream for channel encoding, and encoding the information... | 12/27/2011 |
| 8086931 | Method and device for multi phase error-correction Data bits to be encoded are split into a plurality of subgroups. Each subgroup is encoded separately to generate a corresponding codeword. Selected subsets are removed from the corresponding codewords, leaving behind shortened codewords, and are many-to-one transfor... | 12/27/2011 |
| 8078932 | Method and apparatus for encoding channel quality indicator and precoding control information bits A method and apparatus for encoding channel quality indicator (CQI) and precoding control information (PCI) bits are disclosed. Each of the input bits, such as CQI bits and/or PCI bits, has a particular significance. The input bits are encoded with a linear block co... | 12/13/2011 |
