Class 714/723 - Error mapping or logging

Subclass of Class 714 - Error detection/correction and fault detection/recovery
Definition: Subject matter in which the detected error or fault is registered
No. of patents: 512
Last issue date: 05/29/2012

«First «Previous1 2 3 4 5 6 7 8 9 10 11 Next»Last»

Number	Title	Issue Date
8190951	Handling of errors in a data processing apparatus having a cache storage and a replicated address storage A data processing apparatus includes processing circuitry, a cache storage, and a replicated address storage having a plurality of entries. On detecting a cache record error, a record of a cache location avoid storage is allocated to store a cache record identifier ...	05/29/2012
8190952	Bitmap cluster analysis of defects in integrated circuits A system and method for defect analysis are disclosed wherein a defect data set is input into the system. A radius value is selected by a user, which is the maximum number of bits that bit failures can be separated from one another to be considered a bit cluster. Wh...	05/29/2012
8176373	Pre-code device, and pre-code system and pre-coding method thereof A pre-code device includes firstly memory circuit, an address decoder, and an alternative logic circuit. The first memory circuit includes a number of memory blocks and at east a replacing block. The memory blocks are pointed by a number of respective physical addre...	05/08/2012
8161334	Externally maintained remap information Disclosed is a system comprising a memory device, a controller to maintain remap information regarding the memory device, and a storage unit to store the maintained remap information, wherein the storage unit is external to the memory device and the controller. ...	04/17/2012
8156392	Apparatus, system, and method for bad block remapping An apparatus, system, and method are disclosed for bad block remapping. A bad block identifier module identifies one or more data blocks on a solid-state storage element as bad blocks. A log update module writes at least a location of each bad block identified by th...	04/10/2012
8156393	Memory system To provide a memory system which determines a memory state such as an exhaustion level and allows a memory to be efficiently used. The memory system includes a NAND type flash memory 1 in which data can be electrically written/erased, a nonvolatile mem...	04/10/2012
8145960	Storage of data in data stores having some faulty storage locations Data storage control circuitry for controlling storage and retrieval of data in a data store in which data is stored in data blocks. A group data store stores data by grouping together blocks that have at least one faulty bit into groups of at least two blocks. For ...	03/27/2012
8127185	Memory devices and methods for managing error regions Memory devices and methods are described that include a stack of memory dies and a logic die. Method and devices described include those that provide for repartitioning the stack of memory dies and storing the new partitions in a memory map. Repartitioning in select...	02/28/2012
8127184	System and method including built-in self test (BIST) circuit to test cache memory A resizable cache memory and a system including a Built-In Self Test (BIST) circuit configured to test a cache memory are disclosed. The system further includes a non-volatile storage device including an E-fuse array to store one or more indicators. Each indicator i...	02/28/2012
8122308	Securely clearing an error indicator In one embodiment, a controller can perform a secure clear of a poisoned indicator associated with an uncorrectable error (after recovery from the error). To this end, the controller may access a register storing an address of a memory location associated with indic...	02/21/2012
8117510	Circuits, architectures, apparatuses, systems, methods, algorithms, software and firmware for using reserved cells to indicate defect positions A circuit including a memory and an error correction code circuit. The memory including (i) a plurality of data storage cells and (ii) at least one reserved cell configured to store status information identifying a status of one or more of the plurality of data stor...	02/14/2012
8099640	Shared diagnosis method for an integrated electronic system including a plurality of memory units A shared diagnosis method may be for an electronic integrated system embedding a plurality of memory units associated with Built In Self Test (BIST) hardware portions for executing a test on memory locations of the memory units. A FAIL signal may be provided from th...	01/17/2012
8095836	Time-based techniques for detecting an imminent read failure in a memory array A technique for detecting an imminent read failure in a memory array includes determining a first incident count for a memory array that does not exhibit an uncorrectable error correcting code (ECC) read during an array integrity check. In this case, the first incid...	01/10/2012
8091000	Disabling portions of memory with defects An apparatus and methods are disclosed herein for identifying and avoiding attempts to access a defective portion of memory. Errors associated with portions of memory, such as a cache memory, are tracked over time enabling detection of both hard and erratic errors. ...	01/03/2012
8086919	Controller having flash memory testing functions, and storage system and testing method thereof A flash memory controller having a flash memory testing functions is provided, in which the flash memory controller includes a microprocessor unit, a flash memory interface unit, a host interface unit and a memory cell testing unit. The flash memory interface unit i...	12/27/2011
8074130	Test apparatus A test apparatus includes a test section that executes testing of each cell of the memory under test, a fail information storage section that stores fail information in a fail memory; a counting section that counts the number of defective cells in each block, a read...	12/06/2011
8069384	Scanning reassigned data storage locations An aspect of the present disclosure relates to scanning reassigned data storage locations. In one example, a reassignment table is accessed to identify a deallocated data storage location and scan the deallocated data storage location for media defects. ...	11/29/2011
8069385	Programmable built-in self-test architecture A PBIST architecture is described. A data path circuit is configured for bit-to-associated bit comparisons of expected result data read from a tile with the expected result data read from result memory. The data path circuit is configured to write a first type of fa...	11/29/2011
8069383	Apparatus, system, and method for bad block remapping An apparatus, system, and method are disclosed for bad block remapping. A bad block identifier module identifies one or more data blocks on a solid-state storage element as bad blocks. A log update module writes at least a location of each bad block identified by th...	11/29/2011
8065573	Method and apparatus for tracking, reporting and correcting single-bit memory errors Various embodiments include an apparatus comprising a memory device including a plurality of addressable memory locations, and a memory manager coupled to the memory device, the memory manager including a scheduling unit and a histogram data structure including a pl...	11/22/2011
8055960	Self test apparatus for identifying partially defective memory A computing system is provided which includes a processor having a cache memory. The cache memory includes a plurality of independently configurable subdivisions, each subdivision including a memory array. A service element (SE) of the computing system is operable t...	11/08/2011
8046646	Defective memory block identification in a memory device During manufacture and testing of a memory device, a memory test is performed to determine which, if any, memory blocks are defective. A memory map of the defective blocks is stored in one of the defect-free memory blocks so that it can be read later by a controller...	10/25/2011
8046645	Bad block identifying method for flash memory, storage system, and controller thereof A bad block identifying method for a flash memory, a storage system, and a controller thereof are provided. The bad block identifying method includes determining whether a programming error occurs in a block of the flash memory after the block is programmed and mark...	10/25/2011
8020046	Transaction log management A transaction processing system comprising a transaction log, a log management policy, a profile and a log manager, and method for managing the transaction log are provided. The method comprises maintaining a transaction log of recoverable changes made by transactio...	09/13/2011
7996736	Bad page marking strategy for fast readout in memory A technique for identifying bad pages of storage elements in a memory device. A flag byte is provided for each page group of one or more pages which indicates whether the page group is healthy. Flag bytes of selected page groups also indicate whether larger sets of ...	08/09/2011
7992061	Method for testing reliability of solid-state storage medium A method for testing a reliability of a solid-state storage medium is provided, wherein the solid-state storage medium has a plurality of blocks. First, a lifetime of each of the blocks of the solid-state storage medium is obtained. Then, an erase count of each of t...	08/02/2011
7984345	Test apparatus and test method A test apparatus compares bits included in a data sequence read from a DUT with expectation values. Comparison results are stored in a first failure memory (FM) as bit information indicating whether storage cells of the DUT are non-defective. The storage device coun...	07/19/2011
7975193	Solid state storage end of life prediction with correction history Described embodiments provide for end-of-life (EOL) checking for NAND flash devices. An exemplary implementation of a computing environment comprises at least one NAND data storage device operative to store one or more data elements. In the illustrative implementati...	07/05/2011
7966532	Method for selectively retrieving column redundancy data in memory device Column redundancy data is selectively retrieved in a memory device according to a set of storage elements which is currently being accessed, such as in a read or write operation. The memory device is organized into sets of storage elements such as logical blocks, wh...	06/21/2011
7962810	Recording medium structure capable of displaying defect rate A recording medium structure capable of displaying a defect rate is provided. The recording medium has at least one use area with endurance blocks, and each endurance block has an endurance value. The recording medium structure has a housing, a first and a second of...	06/14/2011
7954021	Solid state drive with flash sparing A method for flash sparing on a solid state drive (SSD) includes detecting a failure from a primary memory device; determining if a failure threshold for the primary memory device has been reached; and, in the event the failure threshold for the primary memory devic...	05/31/2011
7949913	Method for creating a memory defect map and optimizing performance using the memory defect map A method for storing a memory defect map is disclosed whereby a memory component is tested for defects at the time of manufacture and any memory defects detected are stored in a memory defect map and used to optimize the system performance. The memory defect map is ...	05/24/2011
7945826	Test apparatus and test method Provided is a test apparatus having a bad block memory for storing a plurality of pieces of fail information in association with blocks of a memory under test, each piece of fail information indicating whether there is a defect in the associated block. The test appa...	05/17/2011
7930602	Method and system for performing a double pass NTH fail bitmap of a device memory A method for performing a double pass nth fail bitmap of a memory array of a device under test includes a memory built-in test (MBIST) unit reading previously written data from each location of the memory array during a first pass, and detecting a failure...	04/19/2011
7930601	AC ABIST diagnostic method, apparatus and program product A method for implementing at speed bit fail mapping of an embedded memory system having ABIST (Array Built In Self Testing), comprises using a high speed multiplied clock which is a multiple of an external clock of an external tester to sequence ABIST bit fail testi...	04/19/2011
7925939	Pre-code device, and pre-code system and pre-coding method thererof A pre-code device includes firstly memory circuit, an address decoder, and an alternative logic circuit. The first memory circuit includes a number of memory blocks and at east a replacing block. The memory blocks are pointed by a number of respective physical addre...	04/12/2011
7925938	Structure and method of repairing SDRAM by generating slicing table of fault distribution A structure and method for repairing SDRAM by generating a Slicing Table of Fault Distribution and using the size of SDRAM page as the partition basic block. The Slicing Table of Fault Distribution is generated at each booting or memory-testing, and the elemental ra...	04/12/2011
7886206	Semiconductor memory test device and method thereof A semiconductor memory test device and method thereof are provided. The example semiconductor memory test device may include a fail memory configured to store at least one test result of a memory under test, a mode selecting unit configured to output a selection sig...	02/08/2011
7870446	Information processing apparatus and nonvolatile semiconductor memory drive According to one embodiment, an information processing apparatus includes an information processing apparatus main body, and a nonvolatile semiconductor memory drive. The semiconductor memory drive includes a control module configured to control execution of data re...	01/11/2011
7865788	Dynamic mask memory for serial scan testing A failure mask memory is added to a semiconductor tester. In conjunction with a new failure filter, failures may be ignored or used to update the contents of failure mask memory. Only the first instance of a failure is reported reducing the size of test data logs.	01/04/2011

«First «Previous1 2 3 4 5 6 7 8 9 10 11 Next»Last»

PatentStorm

Bizarre Patents

PatentStorm News

Class 714/723 - Error mapping or logging